mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-15 17:37:22 +07:00
29bb45f25f
The regmap API has an endianness setting for formatting reads and writes. This can be set by the usual DT "little-endian" and "big-endian" properties. To work properly the associated regmap_bus needs to read/write in native endian. The "syscon" DT device binding creates an mmio-based regmap_bus which performs all reads/writes as little-endian. These values are then converted again by regmap, which means that all of the MIPS BCM boards (which are big-endian) have been declared as "little-endian" to get regmap to convert them back to big-endian. Modify regmap-mmio to use the native-endian functions __raw_read*() and __raw_write*() instead of the little-endian functions read*() and write*(). Modify the big-endian MIPS BCM boards to use what will now be the correct endianness instead of pretending that the devices are little-endian. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Mark Brown <broonie@kernel.org>
360 lines
7.8 KiB
Plaintext
360 lines
7.8 KiB
Plaintext
/ {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "brcm,bcm7346";
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mips-hpt-frequency = <163125000>;
|
|
|
|
cpu@0 {
|
|
compatible = "brcm,bmips5000";
|
|
device_type = "cpu";
|
|
reg = <0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "brcm,bmips5000";
|
|
device_type = "cpu";
|
|
reg = <1>;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
uart0 = &uart0;
|
|
uart1 = &uart1;
|
|
uart2 = &uart2;
|
|
};
|
|
|
|
cpu_intc: cpu_intc {
|
|
#address-cells = <0>;
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
clocks {
|
|
uart_clk: uart_clk {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <81000000>;
|
|
};
|
|
};
|
|
|
|
rdb {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
compatible = "simple-bus";
|
|
ranges = <0 0x10000000 0x01000000>;
|
|
|
|
periph_intc: periph_intc@411400 {
|
|
compatible = "brcm,bcm7038-l1-intc";
|
|
reg = <0x411400 0x30>, <0x411600 0x30>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&cpu_intc>;
|
|
interrupts = <2>, <3>;
|
|
};
|
|
|
|
sun_l2_intc: sun_l2_intc@403000 {
|
|
compatible = "brcm,l2-intc";
|
|
reg = <0x403000 0x30>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <51>;
|
|
};
|
|
|
|
gisb-arb@400000 {
|
|
compatible = "brcm,bcm7400-gisb-arb";
|
|
reg = <0x400000 0xdc>;
|
|
native-endian;
|
|
interrupt-parent = <&sun_l2_intc>;
|
|
interrupts = <0>, <2>;
|
|
brcm,gisb-arb-master-mask = <0x673>;
|
|
brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
|
|
"rdc_0", "raaga_0",
|
|
"jtag_0", "svd_0";
|
|
};
|
|
|
|
upg_irq0_intc: upg_irq0_intc@406780 {
|
|
compatible = "brcm,bcm7120-l2-intc";
|
|
reg = <0x406780 0x8>;
|
|
|
|
brcm,int-map-mask = <0x44>, <0xf000000>;
|
|
brcm,int-fwd-mask = <0x70000>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <59>, <57>;
|
|
interrupt-names = "upg_main", "upg_bsc";
|
|
};
|
|
|
|
upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
|
|
compatible = "brcm,bcm7120-l2-intc";
|
|
reg = <0x408b80 0x8>;
|
|
|
|
brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
|
|
brcm,int-fwd-mask = <0>;
|
|
brcm,irq-can-wake;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <60>, <58>, <62>;
|
|
interrupt-names = "upg_main_aon", "upg_bsc_aon",
|
|
"upg_spi";
|
|
};
|
|
|
|
sun_top_ctrl: syscon@404000 {
|
|
compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
|
|
reg = <0x404000 0x51c>;
|
|
};
|
|
|
|
reboot {
|
|
compatible = "brcm,brcmstb-reboot";
|
|
syscon = <&sun_top_ctrl 0x304 0x308>;
|
|
};
|
|
|
|
uart0: serial@406900 {
|
|
compatible = "ns16550a";
|
|
reg = <0x406900 0x20>;
|
|
reg-io-width = <0x4>;
|
|
reg-shift = <0x2>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <64>;
|
|
clocks = <&uart_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@406940 {
|
|
compatible = "ns16550a";
|
|
reg = <0x406940 0x20>;
|
|
reg-io-width = <0x4>;
|
|
reg-shift = <0x2>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <65>;
|
|
clocks = <&uart_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart2: serial@406980 {
|
|
compatible = "ns16550a";
|
|
reg = <0x406980 0x20>;
|
|
reg-io-width = <0x4>;
|
|
reg-shift = <0x2>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <66>;
|
|
clocks = <&uart_clk>;
|
|
status = "disabled";
|
|
};
|
|
|
|
bsca: i2c@406200 {
|
|
clock-frequency = <390000>;
|
|
compatible = "brcm,brcmstb-i2c";
|
|
interrupt-parent = <&upg_irq0_intc>;
|
|
reg = <0x406200 0x58>;
|
|
interrupts = <24>;
|
|
interrupt-names = "upg_bsca";
|
|
status = "disabled";
|
|
};
|
|
|
|
bscb: i2c@406280 {
|
|
clock-frequency = <390000>;
|
|
compatible = "brcm,brcmstb-i2c";
|
|
interrupt-parent = <&upg_irq0_intc>;
|
|
reg = <0x406280 0x58>;
|
|
interrupts = <25>;
|
|
interrupt-names = "upg_bscb";
|
|
status = "disabled";
|
|
};
|
|
|
|
bscc: i2c@406300 {
|
|
clock-frequency = <390000>;
|
|
compatible = "brcm,brcmstb-i2c";
|
|
interrupt-parent = <&upg_irq0_intc>;
|
|
reg = <0x406300 0x58>;
|
|
interrupts = <26>;
|
|
interrupt-names = "upg_bscc";
|
|
status = "disabled";
|
|
};
|
|
|
|
bscd: i2c@406380 {
|
|
clock-frequency = <390000>;
|
|
compatible = "brcm,brcmstb-i2c";
|
|
interrupt-parent = <&upg_irq0_intc>;
|
|
reg = <0x406380 0x58>;
|
|
interrupts = <27>;
|
|
interrupt-names = "upg_bscd";
|
|
status = "disabled";
|
|
};
|
|
|
|
bsce: i2c@408980 {
|
|
clock-frequency = <390000>;
|
|
compatible = "brcm,brcmstb-i2c";
|
|
interrupt-parent = <&upg_aon_irq0_intc>;
|
|
reg = <0x408980 0x58>;
|
|
interrupts = <27>;
|
|
interrupt-names = "upg_bsce";
|
|
status = "disabled";
|
|
};
|
|
|
|
enet0: ethernet@430000 {
|
|
phy-mode = "internal";
|
|
phy-handle = <&phy1>;
|
|
mac-address = [ 00 10 18 36 23 1a ];
|
|
compatible = "brcm,genet-v2";
|
|
#address-cells = <0x1>;
|
|
#size-cells = <0x1>;
|
|
reg = <0x430000 0x4c8c>;
|
|
interrupts = <24>, <25>;
|
|
interrupt-parent = <&periph_intc>;
|
|
status = "disabled";
|
|
|
|
mdio@e14 {
|
|
compatible = "brcm,genet-mdio-v2";
|
|
#address-cells = <0x1>;
|
|
#size-cells = <0x0>;
|
|
reg = <0xe14 0x8>;
|
|
|
|
phy1: ethernet-phy@1 {
|
|
max-speed = <100>;
|
|
reg = <0x1>;
|
|
compatible = "brcm,40nm-ephy",
|
|
"ethernet-phy-ieee802.3-c22";
|
|
};
|
|
};
|
|
};
|
|
|
|
ehci0: usb@480300 {
|
|
compatible = "brcm,bcm7346-ehci", "generic-ehci";
|
|
reg = <0x480300 0x100>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <68>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ohci0: usb@480400 {
|
|
compatible = "brcm,bcm7346-ohci", "generic-ohci";
|
|
reg = <0x480400 0x100>;
|
|
native-endian;
|
|
no-big-frame-no;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <70>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ehci1: usb@480500 {
|
|
compatible = "brcm,bcm7346-ehci", "generic-ehci";
|
|
reg = <0x480500 0x100>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <69>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ohci1: usb@480600 {
|
|
compatible = "brcm,bcm7346-ohci", "generic-ohci";
|
|
reg = <0x480600 0x100>;
|
|
native-endian;
|
|
no-big-frame-no;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <71>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ehci2: usb@490300 {
|
|
compatible = "brcm,bcm7346-ehci", "generic-ehci";
|
|
reg = <0x490300 0x100>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <73>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ohci2: usb@490400 {
|
|
compatible = "brcm,bcm7346-ohci", "generic-ohci";
|
|
reg = <0x490400 0x100>;
|
|
native-endian;
|
|
no-big-frame-no;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <75>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ehci3: usb@490500 {
|
|
compatible = "brcm,bcm7346-ehci", "generic-ehci";
|
|
reg = <0x490500 0x100>;
|
|
native-endian;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <74>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ohci3: usb@490600 {
|
|
compatible = "brcm,bcm7346-ohci", "generic-ohci";
|
|
reg = <0x490600 0x100>;
|
|
native-endian;
|
|
no-big-frame-no;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <76>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sata: sata@181000 {
|
|
compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
|
|
reg-names = "ahci", "top-ctrl";
|
|
reg = <0x181000 0xa9c>, <0x180020 0x1c>;
|
|
interrupt-parent = <&periph_intc>;
|
|
interrupts = <40>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
brcm,broken-ncq;
|
|
brcm,broken-phy;
|
|
status = "disabled";
|
|
|
|
sata0: sata-port@0 {
|
|
reg = <0>;
|
|
phys = <&sata_phy0>;
|
|
};
|
|
|
|
sata1: sata-port@1 {
|
|
reg = <1>;
|
|
phys = <&sata_phy1>;
|
|
};
|
|
};
|
|
|
|
sata_phy: sata-phy@1800000 {
|
|
compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
|
|
reg = <0x180100 0x0eff>;
|
|
reg-names = "phy";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
sata_phy0: sata-phy@0 {
|
|
reg = <0>;
|
|
#phy-cells = <0>;
|
|
};
|
|
|
|
sata_phy1: sata-phy@1 {
|
|
reg = <1>;
|
|
#phy-cells = <0>;
|
|
};
|
|
};
|
|
};
|
|
};
|