mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 17:05:18 +07:00
76250f2b74
[ 236.821534] WARNING: kmemcheck: Caught 64-bit read from uninitialized memory (ffff8802538683d0) [ 236.828642] 420000001e7f0000000000000000000000080000000000000000000000000000 [ 236.839543] i i i i u u u u i i i i i i i i u u u u u u u u u u u u u u u u [ 236.850420] ^ [ 236.854123] RIP: 0010:[<ffffffff81396f07>] [<ffffffff81396f07>] fence_signal+0x17/0xd0 [ 236.861313] RSP: 0018:ffff88024acd7ba0 EFLAGS: 00010282 [ 236.865027] RAX: ffffffff812f6a90 RBX: ffff8802527ca800 RCX: ffff880252cb30e0 [ 236.868801] RDX: ffff88024ac5d918 RSI: ffff880252f780e0 RDI: ffff880253868380 [ 236.872579] RBP: ffff88024acd7bc0 R08: ffff88024acd7be0 R09: 0000000000000000 [ 236.876407] R10: 0000000000000000 R11: 0000000000000000 R12: ffff880253868380 [ 236.880185] R13: ffff8802538684d0 R14: ffff880253868380 R15: ffff88024cd48e00 [ 236.883983] FS: 00007f1646d1a740(0000) GS:ffff88025d000000(0000) knlGS:0000000000000000 [ 236.890959] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 236.894702] CR2: ffff880251360318 CR3: 000000024ad21000 CR4: 00000000001406f0 [ 236.898481] [<ffffffff8130d1ad>] i915_gem_request_retire+0x1cd/0x230 [ 236.902439] [<ffffffff8130e2b3>] i915_gem_request_alloc+0xa3/0x2f0 [ 236.906435] [<ffffffff812fb1bd>] i915_gem_do_execbuffer.isra.41+0xb6d/0x18b0 [ 236.910434] [<ffffffff812fc265>] i915_gem_execbuffer2+0x95/0x1e0 [ 236.914390] [<ffffffff812ad625>] drm_ioctl+0x1e5/0x460 [ 236.918275] [<ffffffff8110d4cf>] do_vfs_ioctl+0x8f/0x5c0 [ 236.922168] [<ffffffff8110da3c>] SyS_ioctl+0x3c/0x70 [ 236.926090] [<ffffffff814b7a5f>] entry_SYSCALL_64_fastpath+0x17/0x93 [ 236.930045] [<ffffffffffffffff>] 0xffffffffffffffff We only set the timestamp before we mark the fence as signaled. It is done before to avoid observers having a window in which they may see the fence as complete but no timestamp. Having it does incur a potential for the timestamp to be written twice, and even for it to be corrupted if the u64 write is not atomic. Instead use a new bit to record the presence of the timestamp, and teach the readers to wait until it is set if the fence is complete. There still remains a race where the timestamp for the signaled fence may be shown before the fence is reported as signaled, but that's a pre-existing error. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Gustavo Padovan <gustavo@padovan.org> Cc: Daniel Vetter <daniel.vetter@intel.com> Reported-by: Rafael Antognolli <rafael.antognolli@intel.com> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170214124001.1930-1-chris@chris-wilson.co.uk
485 lines
17 KiB
C
485 lines
17 KiB
C
/*
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* Fence mechanism for dma-buf to allow for asynchronous dma access
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*
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* Copyright (C) 2012 Canonical Ltd
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* Copyright (C) 2012 Texas Instruments
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*
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* Authors:
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* Rob Clark <robdclark@gmail.com>
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* Maarten Lankhorst <maarten.lankhorst@canonical.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __LINUX_DMA_FENCE_H
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#define __LINUX_DMA_FENCE_H
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#include <linux/err.h>
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#include <linux/wait.h>
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#include <linux/list.h>
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#include <linux/bitops.h>
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#include <linux/kref.h>
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#include <linux/sched.h>
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#include <linux/printk.h>
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#include <linux/rcupdate.h>
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struct dma_fence;
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struct dma_fence_ops;
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struct dma_fence_cb;
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/**
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* struct dma_fence - software synchronization primitive
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* @refcount: refcount for this fence
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* @ops: dma_fence_ops associated with this fence
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* @rcu: used for releasing fence with kfree_rcu
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* @cb_list: list of all callbacks to call
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* @lock: spin_lock_irqsave used for locking
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* @context: execution context this fence belongs to, returned by
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* dma_fence_context_alloc()
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* @seqno: the sequence number of this fence inside the execution context,
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* can be compared to decide which fence would be signaled later.
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* @flags: A mask of DMA_FENCE_FLAG_* defined below
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* @timestamp: Timestamp when the fence was signaled.
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* @error: Optional, only valid if < 0, must be set before calling
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* dma_fence_signal, indicates that the fence has completed with an error.
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*
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* the flags member must be manipulated and read using the appropriate
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* atomic ops (bit_*), so taking the spinlock will not be needed most
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* of the time.
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*
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* DMA_FENCE_FLAG_SIGNALED_BIT - fence is already signaled
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* DMA_FENCE_FLAG_TIMESTAMP_BIT - timestamp recorded for fence signaling
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* DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT - enable_signaling might have been called
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* DMA_FENCE_FLAG_USER_BITS - start of the unused bits, can be used by the
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* implementer of the fence for its own purposes. Can be used in different
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* ways by different fence implementers, so do not rely on this.
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*
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* Since atomic bitops are used, this is not guaranteed to be the case.
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* Particularly, if the bit was set, but dma_fence_signal was called right
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* before this bit was set, it would have been able to set the
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* DMA_FENCE_FLAG_SIGNALED_BIT, before enable_signaling was called.
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* Adding a check for DMA_FENCE_FLAG_SIGNALED_BIT after setting
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* DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT closes this race, and makes sure that
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* after dma_fence_signal was called, any enable_signaling call will have either
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* been completed, or never called at all.
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*/
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struct dma_fence {
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struct kref refcount;
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const struct dma_fence_ops *ops;
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struct rcu_head rcu;
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struct list_head cb_list;
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spinlock_t *lock;
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u64 context;
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unsigned seqno;
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unsigned long flags;
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ktime_t timestamp;
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int error;
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};
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enum dma_fence_flag_bits {
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DMA_FENCE_FLAG_SIGNALED_BIT,
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DMA_FENCE_FLAG_TIMESTAMP_BIT,
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DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,
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DMA_FENCE_FLAG_USER_BITS, /* must always be last member */
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};
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typedef void (*dma_fence_func_t)(struct dma_fence *fence,
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struct dma_fence_cb *cb);
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/**
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* struct dma_fence_cb - callback for dma_fence_add_callback
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* @node: used by dma_fence_add_callback to append this struct to fence::cb_list
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* @func: dma_fence_func_t to call
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*
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* This struct will be initialized by dma_fence_add_callback, additional
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* data can be passed along by embedding dma_fence_cb in another struct.
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*/
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struct dma_fence_cb {
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struct list_head node;
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dma_fence_func_t func;
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};
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/**
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* struct dma_fence_ops - operations implemented for fence
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* @get_driver_name: returns the driver name.
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* @get_timeline_name: return the name of the context this fence belongs to.
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* @enable_signaling: enable software signaling of fence.
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* @signaled: [optional] peek whether the fence is signaled, can be null.
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* @wait: custom wait implementation, or dma_fence_default_wait.
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* @release: [optional] called on destruction of fence, can be null
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* @fill_driver_data: [optional] callback to fill in free-form debug info
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* Returns amount of bytes filled, or -errno.
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* @fence_value_str: [optional] fills in the value of the fence as a string
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* @timeline_value_str: [optional] fills in the current value of the timeline
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* as a string
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*
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* Notes on enable_signaling:
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* For fence implementations that have the capability for hw->hw
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* signaling, they can implement this op to enable the necessary
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* irqs, or insert commands into cmdstream, etc. This is called
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* in the first wait() or add_callback() path to let the fence
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* implementation know that there is another driver waiting on
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* the signal (ie. hw->sw case).
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*
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* This function can be called called from atomic context, but not
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* from irq context, so normal spinlocks can be used.
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*
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* A return value of false indicates the fence already passed,
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* or some failure occurred that made it impossible to enable
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* signaling. True indicates successful enabling.
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*
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* fence->error may be set in enable_signaling, but only when false is
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* returned.
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*
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* Calling dma_fence_signal before enable_signaling is called allows
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* for a tiny race window in which enable_signaling is called during,
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* before, or after dma_fence_signal. To fight this, it is recommended
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* that before enable_signaling returns true an extra reference is
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* taken on the fence, to be released when the fence is signaled.
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* This will mean dma_fence_signal will still be called twice, but
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* the second time will be a noop since it was already signaled.
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*
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* Notes on signaled:
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* May set fence->error if returning true.
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*
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* Notes on wait:
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* Must not be NULL, set to dma_fence_default_wait for default implementation.
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* the dma_fence_default_wait implementation should work for any fence, as long
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* as enable_signaling works correctly.
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*
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* Must return -ERESTARTSYS if the wait is intr = true and the wait was
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* interrupted, and remaining jiffies if fence has signaled, or 0 if wait
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* timed out. Can also return other error values on custom implementations,
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* which should be treated as if the fence is signaled. For example a hardware
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* lockup could be reported like that.
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*
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* Notes on release:
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* Can be NULL, this function allows additional commands to run on
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* destruction of the fence. Can be called from irq context.
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* If pointer is set to NULL, kfree will get called instead.
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*/
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struct dma_fence_ops {
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const char * (*get_driver_name)(struct dma_fence *fence);
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const char * (*get_timeline_name)(struct dma_fence *fence);
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bool (*enable_signaling)(struct dma_fence *fence);
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bool (*signaled)(struct dma_fence *fence);
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signed long (*wait)(struct dma_fence *fence,
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bool intr, signed long timeout);
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void (*release)(struct dma_fence *fence);
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int (*fill_driver_data)(struct dma_fence *fence, void *data, int size);
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void (*fence_value_str)(struct dma_fence *fence, char *str, int size);
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void (*timeline_value_str)(struct dma_fence *fence,
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char *str, int size);
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};
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void dma_fence_init(struct dma_fence *fence, const struct dma_fence_ops *ops,
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spinlock_t *lock, u64 context, unsigned seqno);
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void dma_fence_release(struct kref *kref);
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void dma_fence_free(struct dma_fence *fence);
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/**
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* dma_fence_put - decreases refcount of the fence
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* @fence: [in] fence to reduce refcount of
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*/
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static inline void dma_fence_put(struct dma_fence *fence)
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{
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if (fence)
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kref_put(&fence->refcount, dma_fence_release);
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}
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/**
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* dma_fence_get - increases refcount of the fence
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* @fence: [in] fence to increase refcount of
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*
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* Returns the same fence, with refcount increased by 1.
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*/
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static inline struct dma_fence *dma_fence_get(struct dma_fence *fence)
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{
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if (fence)
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kref_get(&fence->refcount);
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return fence;
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}
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/**
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* dma_fence_get_rcu - get a fence from a reservation_object_list with
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* rcu read lock
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* @fence: [in] fence to increase refcount of
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*
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* Function returns NULL if no refcount could be obtained, or the fence.
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*/
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static inline struct dma_fence *dma_fence_get_rcu(struct dma_fence *fence)
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{
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if (kref_get_unless_zero(&fence->refcount))
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return fence;
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else
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return NULL;
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}
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/**
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* dma_fence_get_rcu_safe - acquire a reference to an RCU tracked fence
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* @fencep: [in] pointer to fence to increase refcount of
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*
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* Function returns NULL if no refcount could be obtained, or the fence.
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* This function handles acquiring a reference to a fence that may be
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* reallocated within the RCU grace period (such as with SLAB_TYPESAFE_BY_RCU),
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* so long as the caller is using RCU on the pointer to the fence.
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*
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* An alternative mechanism is to employ a seqlock to protect a bunch of
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* fences, such as used by struct reservation_object. When using a seqlock,
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* the seqlock must be taken before and checked after a reference to the
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* fence is acquired (as shown here).
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*
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* The caller is required to hold the RCU read lock.
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*/
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static inline struct dma_fence *
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dma_fence_get_rcu_safe(struct dma_fence * __rcu *fencep)
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{
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do {
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struct dma_fence *fence;
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fence = rcu_dereference(*fencep);
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if (!fence || !dma_fence_get_rcu(fence))
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return NULL;
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/* The atomic_inc_not_zero() inside dma_fence_get_rcu()
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* provides a full memory barrier upon success (such as now).
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* This is paired with the write barrier from assigning
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* to the __rcu protected fence pointer so that if that
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* pointer still matches the current fence, we know we
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* have successfully acquire a reference to it. If it no
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* longer matches, we are holding a reference to some other
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* reallocated pointer. This is possible if the allocator
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* is using a freelist like SLAB_TYPESAFE_BY_RCU where the
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* fence remains valid for the RCU grace period, but it
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* may be reallocated. When using such allocators, we are
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* responsible for ensuring the reference we get is to
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* the right fence, as below.
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*/
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if (fence == rcu_access_pointer(*fencep))
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return rcu_pointer_handoff(fence);
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dma_fence_put(fence);
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} while (1);
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}
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int dma_fence_signal(struct dma_fence *fence);
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int dma_fence_signal_locked(struct dma_fence *fence);
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signed long dma_fence_default_wait(struct dma_fence *fence,
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bool intr, signed long timeout);
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int dma_fence_add_callback(struct dma_fence *fence,
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struct dma_fence_cb *cb,
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dma_fence_func_t func);
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bool dma_fence_remove_callback(struct dma_fence *fence,
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struct dma_fence_cb *cb);
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void dma_fence_enable_sw_signaling(struct dma_fence *fence);
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/**
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* dma_fence_is_signaled_locked - Return an indication if the fence
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* is signaled yet.
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* @fence: [in] the fence to check
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*
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* Returns true if the fence was already signaled, false if not. Since this
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* function doesn't enable signaling, it is not guaranteed to ever return
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* true if dma_fence_add_callback, dma_fence_wait or
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* dma_fence_enable_sw_signaling haven't been called before.
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*
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* This function requires fence->lock to be held.
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*/
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static inline bool
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dma_fence_is_signaled_locked(struct dma_fence *fence)
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{
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return true;
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if (fence->ops->signaled && fence->ops->signaled(fence)) {
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dma_fence_signal_locked(fence);
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return true;
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}
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return false;
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}
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/**
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* dma_fence_is_signaled - Return an indication if the fence is signaled yet.
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* @fence: [in] the fence to check
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*
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* Returns true if the fence was already signaled, false if not. Since this
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* function doesn't enable signaling, it is not guaranteed to ever return
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* true if dma_fence_add_callback, dma_fence_wait or
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* dma_fence_enable_sw_signaling haven't been called before.
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*
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* It's recommended for seqno fences to call dma_fence_signal when the
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* operation is complete, it makes it possible to prevent issues from
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* wraparound between time of issue and time of use by checking the return
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* value of this function before calling hardware-specific wait instructions.
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*/
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static inline bool
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dma_fence_is_signaled(struct dma_fence *fence)
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{
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
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return true;
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if (fence->ops->signaled && fence->ops->signaled(fence)) {
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dma_fence_signal(fence);
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return true;
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}
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return false;
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}
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/**
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* dma_fence_is_later - return if f1 is chronologically later than f2
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* @f1: [in] the first fence from the same context
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* @f2: [in] the second fence from the same context
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*
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* Returns true if f1 is chronologically later than f2. Both fences must be
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* from the same context, since a seqno is not re-used across contexts.
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*/
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static inline bool dma_fence_is_later(struct dma_fence *f1,
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struct dma_fence *f2)
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{
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if (WARN_ON(f1->context != f2->context))
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return false;
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return (int)(f1->seqno - f2->seqno) > 0;
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}
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/**
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* dma_fence_later - return the chronologically later fence
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* @f1: [in] the first fence from the same context
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* @f2: [in] the second fence from the same context
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*
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* Returns NULL if both fences are signaled, otherwise the fence that would be
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* signaled last. Both fences must be from the same context, since a seqno is
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* not re-used across contexts.
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*/
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static inline struct dma_fence *dma_fence_later(struct dma_fence *f1,
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struct dma_fence *f2)
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{
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if (WARN_ON(f1->context != f2->context))
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return NULL;
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/*
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* Can't check just DMA_FENCE_FLAG_SIGNALED_BIT here, it may never
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* have been set if enable_signaling wasn't called, and enabling that
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* here is overkill.
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*/
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if (dma_fence_is_later(f1, f2))
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return dma_fence_is_signaled(f1) ? NULL : f1;
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else
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return dma_fence_is_signaled(f2) ? NULL : f2;
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}
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/**
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* dma_fence_get_status_locked - returns the status upon completion
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* @fence: [in] the dma_fence to query
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*
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* Drivers can supply an optional error status condition before they signal
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* the fence (to indicate whether the fence was completed due to an error
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* rather than success). The value of the status condition is only valid
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* if the fence has been signaled, dma_fence_get_status_locked() first checks
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* the signal state before reporting the error status.
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*
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* Returns 0 if the fence has not yet been signaled, 1 if the fence has
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* been signaled without an error condition, or a negative error code
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* if the fence has been completed in err.
|
|
*/
|
|
static inline int dma_fence_get_status_locked(struct dma_fence *fence)
|
|
{
|
|
if (dma_fence_is_signaled_locked(fence))
|
|
return fence->error ?: 1;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
int dma_fence_get_status(struct dma_fence *fence);
|
|
|
|
/**
|
|
* dma_fence_set_error - flag an error condition on the fence
|
|
* @fence: [in] the dma_fence
|
|
* @error: [in] the error to store
|
|
*
|
|
* Drivers can supply an optional error status condition before they signal
|
|
* the fence, to indicate that the fence was completed due to an error
|
|
* rather than success. This must be set before signaling (so that the value
|
|
* is visible before any waiters on the signal callback are woken). This
|
|
* helper exists to help catching erroneous setting of #dma_fence.error.
|
|
*/
|
|
static inline void dma_fence_set_error(struct dma_fence *fence,
|
|
int error)
|
|
{
|
|
BUG_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));
|
|
BUG_ON(error >= 0 || error < -MAX_ERRNO);
|
|
|
|
fence->error = error;
|
|
}
|
|
|
|
signed long dma_fence_wait_timeout(struct dma_fence *,
|
|
bool intr, signed long timeout);
|
|
signed long dma_fence_wait_any_timeout(struct dma_fence **fences,
|
|
uint32_t count,
|
|
bool intr, signed long timeout,
|
|
uint32_t *idx);
|
|
|
|
/**
|
|
* dma_fence_wait - sleep until the fence gets signaled
|
|
* @fence: [in] the fence to wait on
|
|
* @intr: [in] if true, do an interruptible wait
|
|
*
|
|
* This function will return -ERESTARTSYS if interrupted by a signal,
|
|
* or 0 if the fence was signaled. Other error values may be
|
|
* returned on custom implementations.
|
|
*
|
|
* Performs a synchronous wait on this fence. It is assumed the caller
|
|
* directly or indirectly holds a reference to the fence, otherwise the
|
|
* fence might be freed before return, resulting in undefined behavior.
|
|
*/
|
|
static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr)
|
|
{
|
|
signed long ret;
|
|
|
|
/* Since dma_fence_wait_timeout cannot timeout with
|
|
* MAX_SCHEDULE_TIMEOUT, only valid return values are
|
|
* -ERESTARTSYS and MAX_SCHEDULE_TIMEOUT.
|
|
*/
|
|
ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
|
|
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
|
|
u64 dma_fence_context_alloc(unsigned num);
|
|
|
|
#define DMA_FENCE_TRACE(f, fmt, args...) \
|
|
do { \
|
|
struct dma_fence *__ff = (f); \
|
|
if (IS_ENABLED(CONFIG_DMA_FENCE_TRACE)) \
|
|
pr_info("f %llu#%u: " fmt, \
|
|
__ff->context, __ff->seqno, ##args); \
|
|
} while (0)
|
|
|
|
#define DMA_FENCE_WARN(f, fmt, args...) \
|
|
do { \
|
|
struct dma_fence *__ff = (f); \
|
|
pr_warn("f %llu#%u: " fmt, __ff->context, __ff->seqno, \
|
|
##args); \
|
|
} while (0)
|
|
|
|
#define DMA_FENCE_ERR(f, fmt, args...) \
|
|
do { \
|
|
struct dma_fence *__ff = (f); \
|
|
pr_err("f %llu#%u: " fmt, __ff->context, __ff->seqno, \
|
|
##args); \
|
|
} while (0)
|
|
|
|
#endif /* __LINUX_DMA_FENCE_H */
|