linux_dsm_epyc7002/arch/x86/events/intel
Kan Liang 6017608936 perf/x86/intel: Add Icelake support
Add Icelake core PMU perf code, including constraint tables and the main
enable code.

Icelake expanded the generic counters to always 8 even with HT on, but a
range of events cannot be scheduled on the extra 4 counters.
Add new constraint ranges to describe this to the scheduler.
The number of constraints that need to be checked is larger now than
with earlier CPUs.
At some point we may need a new data structure to look them up more
efficiently than with linear search. So far it still seems to be
acceptable however.

Icelake added a new fixed counter SLOTS. Full support for it is added
later in the patch series.

The cache events table is identical to Skylake.

Compare to PEBS instruction event on generic counter, fixed counter 0
has less skid. Force instruction:ppp always in fixed counter 0.

Originally-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Cc: jolsa@kernel.org
Link: https://lkml.kernel.org/r/20190402194509.2832-9-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2019-04-16 12:26:18 +02:00
..
bts.c perf/aux: Make perf_event accessible to setup_aux() 2019-02-06 10:00:39 -03:00
core.c perf/x86/intel: Add Icelake support 2019-04-16 12:26:18 +02:00
cstate.c perf/core, arch/x86: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUs 2019-01-21 11:01:27 +01:00
ds.c perf/x86/intel: Add Icelake support 2019-04-16 12:26:18 +02:00
knc.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
lbr.c perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them 2019-04-16 12:26:17 +02:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
p4.c x86: Fix various typos in comments 2018-12-03 10:49:13 +01:00
p6.c x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping 2018-02-15 01:15:52 +01:00
pt.c perf, pt, coresight: Fix address filters for vmas with non-zero offset 2019-02-22 16:52:07 -03:00
pt.h perf/x86/intel/pt: Export pt_cap_get() 2018-12-21 11:28:32 +01:00
rapl.c perf/core, arch/x86: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUs 2019-01-21 11:01:27 +01:00
uncore_nhmex.c perf/x86/intel/uncore: Correct fixed counter index check for NHM 2018-05-31 12:36:28 +02:00
uncore_snb.c perf/x86/intel/uncore: Fix client IMC events return huge result 2019-03-09 14:10:31 +01:00
uncore_snbep.c perf/x86/intel/uncore: Add Node ID mask 2019-02-04 08:44:43 +01:00
uncore.c perf/x86/intel/uncore: Fix client IMC events return huge result 2019-03-09 14:10:31 +01:00
uncore.h perf/x86/intel/uncore: Fix client IMC events return huge result 2019-03-09 14:10:31 +01:00