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601734f7aa
linux_dsm_epyc7002/drivers/gpu/drm/i915/gt
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Daniele Ceraolo Spurio 601734f7aa drm/i915/tgl: s/ss/eu fuse reading support 
Gen12 has dual-subslices (DSS), which compared to gen11 subslices have
some duplicated resources/paths. Although DSS behave similarly to 2
subslices, instead of splitting this and presenting userspace with bits
not directly representative of hardware resources, present userspace
with a subslice_mask made up of DSS bits instead.

v2: GEM_BUG_ON on mask size (Lionel)

Bspec: 29547
Bspec: 12247
Cc: Kelvin Gardiner <kelvin.gardiner@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CC: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com> #v1
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com>
Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190913075137.18476-2-chris@chris-wilson.co.uk
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2019-09-21 08:31:08 +01:00
..
selftests drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
uc drm/i915/uc: Update HuC firmware naming convention and load latest HuC 2019-09-20 11:02:47 -07:00
gen6_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen7_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen8_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
gen9_renderstate.c drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_breadcrumbs.c Merge drm/drm-next into drm-intel-next-queued 2019-08-22 00:10:36 -07:00
intel_context_types.h drm/i915/execlists: Lift process_csb() out of the irq-off spinlock 2019-08-16 20:59:02 +01:00
intel_context.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_context.h drm/i915/gt: Mark context->active_count as protected by timeline->mutex 2019-08-16 18:02:06 +01:00
intel_engine_cs.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_pm.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_pm.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
intel_engine_pool_types.h drm/i915: Replace struct_mutex for batch pool serialisation 2019-08-04 14:31:18 +01:00
intel_engine_pool.c drm/i915: Make engine's batch pool safe for use with virtual engines 2019-08-27 16:42:12 +01:00
intel_engine_pool.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_engine_types.h drm/i915: Use engine relative LRIs on context setup 2019-09-06 18:12:25 +01:00
intel_engine_user.c drm/i915: Fix up the inverse mapping for default ctx->engines[] 2019-08-08 15:45:35 +01:00
intel_engine_user.h drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
intel_engine.h drm/i915/guc: Use a local cancel_port_requests 2019-08-13 07:54:39 +01:00
intel_gpu_commands.h drm/i915/tgl: Extend MI_SEMAPHORE_WAIT 2019-09-17 15:33:21 +01:00
intel_gt_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_irq.h drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.c drm/i915: Extract general GT interrupt handlers 2019-08-12 15:36:13 +01:00
intel_gt_pm_irq.h drm/i915: Extract GT powermanagement interrupt handling 2019-08-12 15:36:06 +01:00
intel_gt_pm.c drm/i915: Make pm_notify take intel_gt 2019-09-11 08:11:55 +01:00
intel_gt_pm.h drm/i915: Hook up GT power management 2019-09-06 20:29:58 +01:00
intel_gt_types.h drm/i915/pmu: Use GT parked for estimating RC6 while asleep 2019-09-12 17:02:50 +01:00
intel_gt.c drm/i915: Move GT init to intel_gt.c 2019-09-11 08:11:51 +01:00
intel_gt.h drm/i915: Move GT init to intel_gt.c 2019-09-11 08:11:51 +01:00
intel_hangcheck.c drm/i915: Refactor instdone loops on new subslice functions 2019-08-23 19:14:25 +01:00
intel_lrc_reg.h drm/i915/execlists: Clear STOP_RING bit on reset 2019-09-10 11:04:17 +01:00
intel_lrc.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_lrc.h drm/i915: Make engine's batch pool safe for use with virtual engines 2019-08-27 16:42:12 +01:00
intel_mocs.c drm/i915/gt: Remove stale kerneldoc for internal MOCS functions 2019-08-05 18:27:17 +01:00
intel_mocs.h drm/i915: Move MOCS setup to intel_mocs.c 2019-07-31 07:40:35 -07:00
intel_renderstate.c drm/i915: Serialize against vma moves 2019-08-19 15:25:56 +01:00
intel_renderstate.h drm/i915: Move the renderstate setup under gt/ 2019-07-04 11:48:22 +01:00
intel_reset_types.h drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
intel_reset.c drm/i915: fix SFC reset flow 2019-09-19 11:04:55 +01:00
intel_reset.h drm/i915: Don't mix srcu tag and negative error codes 2019-09-13 15:07:34 +01:00
intel_ringbuffer.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_sseu.c drm/i915: Expand subslice mask 2019-08-23 19:14:27 +01:00
intel_sseu.h drm/i915/tgl: s/ss/eu fuse reading support 2019-09-21 08:31:08 +01:00
intel_timeline_types.h drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
intel_timeline.c drm/i915: Protect timeline->hwsp dereferencing 2019-09-20 10:24:13 +01:00
intel_timeline.h drm/i915/gt: Track timeline activeness in enter/exit 2019-08-15 23:16:05 +01:00
intel_workarounds_types.h drm/i915: Add engine name to workaround debug print 2019-07-12 09:55:30 +01:00
intel_workarounds.c Revert "drm/i915/tgl: Implement Wa_1406941453" 2019-09-20 11:59:33 +01:00
intel_workarounds.h drm/i915: Convert gt workarounds to intel_gt 2019-06-21 13:48:25 +01:00
Makefile drm/i915: use upstream version of header tests 2019-07-30 12:11:57 +03:00
mock_engine.c drm/i915: Protect request retirement with timeline->mutex 2019-08-15 23:21:13 +01:00
mock_engine.h
selftest_context.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
selftest_engine_cs.c drm/i915: Rename engines to match their user interface 2019-08-07 14:30:55 +01:00
selftest_engine_pm.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.c drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_engine.h drm/i915: Defer final intel_wakeref_put to process context 2019-08-08 21:28:51 +01:00
selftest_hangcheck.c drm/i915: Track ggtt fence reservations under its own mutex 2019-08-22 08:53:40 +01:00
selftest_lrc.c drm/i915: Mark i915_request.timeline as a volatile, rcu pointer 2019-09-20 10:24:09 +01:00
selftest_reset.c drm/i915/gt: Use intel_gt as the primary object for handling resets 2019-07-12 21:06:56 +01:00
selftest_timeline.c drm/i915: Markup expected timeline locks for i915_active 2019-08-16 18:02:07 +01:00
selftest_workarounds.c drm/i915/selftests: Add the usual batch vma managements to st_workarounds 2019-08-27 10:21:51 +01:00