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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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07f08d9cee
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
99 lines
2.1 KiB
Plaintext
99 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Google Veyron (and derivatives) fragment for the max98090 audio
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* codec and analog headphone jack.
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*
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* Copyright 2016 Google, Inc
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*/
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/ {
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sound {
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compatible = "rockchip,rockchip-audio-max98090";
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pinctrl-names = "default";
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pinctrl-0 = <&mic_det>, <&hp_det>;
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rockchip,model = "VEYRON-I2S";
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rockchip,i2s-controller = <&i2s>;
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rockchip,audio-codec = <&max98090>;
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rockchip,hp-det-gpios = <&gpio6 RK_PA5 GPIO_ACTIVE_HIGH>;
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rockchip,mic-det-gpios = <&gpio6 RK_PB3 GPIO_ACTIVE_LOW>;
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rockchip,headset-codec = <&headsetcodec>;
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};
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};
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&i2c2 {
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max98090: max98090@10 {
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compatible = "maxim,max98090";
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reg = <0x10>;
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interrupt-parent = <&gpio6>;
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interrupts = <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
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clock-names = "mclk";
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clocks = <&cru SCLK_I2S0_OUT>;
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pinctrl-names = "default";
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pinctrl-0 = <&int_codec>;
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};
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};
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&i2c4 {
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headsetcodec: ts3a227e@3b {
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compatible = "ti,ts3a227e";
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reg = <0x3b>;
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interrupt-parent = <&gpio0>;
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interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ts3a227e_int_l>;
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ti,micbias = <7>; /* MICBIAS = 2.8V */
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};
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};
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&i2s {
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status = "okay";
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};
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&io_domains {
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audio-supply = <&vcc18_codec>;
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};
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&rk808 {
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vcc10-supply = <&vcc33_sys>;
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regulators {
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vcc18_codec: LDO_REG6 {
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regulator-name = "vcc18_codec";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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};
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&pinctrl {
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codec {
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hp_det: hp-det {
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rockchip,pins = <6 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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/*
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* HACK: We're going to _pull down_ this _active low_ interrupt
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* so that it never fires. We don't need this interrupt because
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* we've got a ts3a227e chip but the driver requires it.
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*/
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int_codec: int-codec {
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rockchip,pins = <6 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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mic_det: mic-det {
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rockchip,pins = <6 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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headset {
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ts3a227e_int_l: ts3a227e-int-l {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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