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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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48b16180d0
If we do nothing in suspend/resume, some platform PCIe ip-block can't guarantee the link back to L0 state from sleep, then, when we read the EP device will hang. Only we send pme turnoff message in pci controller suspend, and send pme exit message in resume, the link state will be normal. When we send pme turnoff message in pci controller suspend, the links will into l2/l3 ready, then, host cannot communicate with ep device, but pci-driver will call back EP device to save them state. So we need to change platform_driver->suspend/resume to syscore->suspend/resume. So the new suspend/resume implementation, send pme turnoff message in suspend, and send pme exit message in resume. And add a PME handler, to response PME & message interrupt. Change platform_driver->suspend/resume to syscore->suspend/resume. pci-driver will call back EP device, to save EP state in pci_pm_suspend_noirq, so we need to keep the link, until pci_pm_suspend_noirq finish. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
143 lines
3.2 KiB
C
143 lines
3.2 KiB
C
/*
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* Wind River SBC8548 setup and early boot code.
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*
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* Copyright 2007 Wind River Systems Inc.
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*
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* By Paul Gortmaker (see MAINTAINERS for contact information)
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*
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* Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc.
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/initrd.h>
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#include <linux/interrupt.h>
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#include <linux/fsl_devices.h>
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#include <linux/of_platform.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <linux/atomic.h>
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#include <asm/time.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/ipic.h>
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#include <asm/pci-bridge.h>
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#include <asm/irq.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc85xx.h"
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static int sbc_rev;
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static void __init sbc8548_pic_init(void)
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{
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struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
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0, 256, " OpenPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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}
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/* Extract the HW Rev from the EPLD on the board */
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static int __init sbc8548_hw_rev(void)
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{
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struct device_node *np;
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struct resource res;
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unsigned int *rev;
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int board_rev = 0;
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np = of_find_compatible_node(NULL, NULL, "hw-rev");
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if (np == NULL) {
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printk("No HW-REV found in DTB.\n");
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return -ENODEV;
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}
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of_address_to_resource(np, 0, &res);
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of_node_put(np);
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rev = ioremap(res.start,sizeof(unsigned int));
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board_rev = (*rev) >> 28;
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iounmap(rev);
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return board_rev;
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}
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/*
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* Setup the architecture
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*/
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static void __init sbc8548_setup_arch(void)
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{
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if (ppc_md.progress)
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ppc_md.progress("sbc8548_setup_arch()", 0);
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fsl_pci_assign_primary();
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sbc_rev = sbc8548_hw_rev();
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}
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static void sbc8548_show_cpuinfo(struct seq_file *m)
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{
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uint pvid, svid, phid1;
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pvid = mfspr(SPRN_PVR);
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svid = mfspr(SPRN_SVR);
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seq_printf(m, "Vendor\t\t: Wind River\n");
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seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev);
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seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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/* Display cpu Pll setting */
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phid1 = mfspr(SPRN_HID1);
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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}
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machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init sbc8548_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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return of_flat_dt_is_compatible(root, "SBC8548");
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}
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define_machine(sbc8548) {
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.name = "SBC8548",
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.probe = sbc8548_probe,
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.setup_arch = sbc8548_setup_arch,
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.init_IRQ = sbc8548_pic_init,
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.show_cpuinfo = sbc8548_show_cpuinfo,
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.get_irq = mpic_get_irq,
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.restart = fsl_rstcr_restart,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
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#endif
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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};
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