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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ce508d1b13
Add r8a7790 Core-Standby state for Suspend to RAM support. Signed-off-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
86 lines
2.5 KiB
C
86 lines
2.5 KiB
C
/*
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* SMP support for r8a7790
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*
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* Copyright (C) 2012-2013 Renesas Solutions Corp.
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* Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/smp_plat.h>
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#include <mach/r8a7790.h>
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#include "common.h"
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#include "pm-rcar.h"
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#define RST 0xe6160000
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#define CA15BAR 0x0020
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#define CA7BAR 0x0030
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#define CA15RESCNT 0x0040
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#define CA7RESCNT 0x0044
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#define MERAM 0xe8080000
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static struct rcar_sysc_ch r8a7790_ca15_scu = {
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.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
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.isr_bit = 12, /* CA15-SCU */
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};
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static struct rcar_sysc_ch r8a7790_ca7_scu = {
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.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
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.isr_bit = 21, /* CA7-SCU */
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};
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static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *p;
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u32 bar;
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/* let APMU code install data related to shmobile_boot_vector */
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shmobile_smp_apmu_prepare_cpus(max_cpus);
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/* MERAM for jump stub, because BAR requires 256KB aligned address */
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p = ioremap_nocache(MERAM, shmobile_boot_size);
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memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
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iounmap(p);
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/* setup reset vectors */
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p = ioremap_nocache(RST, 0x63);
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bar = (MERAM >> 8) & 0xfffffc00;
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writel_relaxed(bar, p + CA15BAR);
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writel_relaxed(bar, p + CA7BAR);
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writel_relaxed(bar | 0x10, p + CA15BAR);
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writel_relaxed(bar | 0x10, p + CA7BAR);
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/* enable clocks to all CPUs */
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writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
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p + CA15RESCNT);
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writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
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p + CA7RESCNT);
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iounmap(p);
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/* turn on power to SCU */
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r8a7790_pm_init();
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shmobile_smp_apmu_suspend_init();
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rcar_sysc_power_up(&r8a7790_ca15_scu);
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rcar_sysc_power_up(&r8a7790_ca7_scu);
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}
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struct smp_operations r8a7790_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7790_smp_prepare_cpus,
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.smp_boot_secondary = shmobile_smp_apmu_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_disable = shmobile_smp_cpu_disable,
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.cpu_die = shmobile_smp_apmu_cpu_die,
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.cpu_kill = shmobile_smp_apmu_cpu_kill,
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#endif
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};
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