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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 136 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.384967451@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
142 lines
3.6 KiB
C
142 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* arch/arm/mach-netx/time.c
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*
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* Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/mach/time.h>
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#include <mach/netx-regs.h>
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#define NETX_CLOCK_FREQ 100000000
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#define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ)
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#define TIMER_CLOCKEVENT 0
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#define TIMER_CLOCKSOURCE 1
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static inline void timer_shutdown(struct clock_event_device *evt)
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{
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/* disable timer */
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writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
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}
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static int netx_shutdown(struct clock_event_device *evt)
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{
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timer_shutdown(evt);
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return 0;
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}
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static int netx_set_oneshot(struct clock_event_device *evt)
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{
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u32 tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN;
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timer_shutdown(evt);
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writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
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writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
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return 0;
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}
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static int netx_set_periodic(struct clock_event_device *evt)
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{
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u32 tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
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NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN;
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timer_shutdown(evt);
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writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
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writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
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return 0;
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}
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static int netx_set_next_event(unsigned long evt,
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struct clock_event_device *clk)
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{
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writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT));
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return 0;
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}
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static struct clock_event_device netx_clockevent = {
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.name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_next_event = netx_set_next_event,
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.set_state_shutdown = netx_shutdown,
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.set_state_periodic = netx_set_periodic,
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.set_state_oneshot = netx_set_oneshot,
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.tick_resume = netx_shutdown,
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};
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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netx_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &netx_clockevent;
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/* acknowledge interrupt */
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writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction netx_timer_irq = {
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.name = "NetX Timer Tick",
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.flags = IRQF_TIMER | IRQF_IRQPOLL,
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.handler = netx_timer_interrupt,
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};
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/*
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* Set up timer interrupt
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*/
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void __init netx_timer_init(void)
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{
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/* disable timer initially */
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writel(0, NETX_GPIO_COUNTER_CTRL(0));
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/* Reset the timer value to zero */
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writel(0, NETX_GPIO_COUNTER_CURRENT(0));
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writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0));
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/* acknowledge interrupt */
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writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
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/* Enable the interrupt in the specific timer
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* register and start timer
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*/
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writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
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writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
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NETX_GPIO_COUNTER_CTRL(0));
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setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
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/* Setup timer one for clocksource */
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writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
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writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE));
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writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE));
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writel(NETX_GPIO_COUNTER_CTRL_RUN,
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NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
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clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
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"netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up);
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/* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
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* Adding some safety ... */
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netx_clockevent.cpumask = cpumask_of(0);
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clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ,
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0xa00, 0xfffffffe);
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}
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