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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the version 2 of the gnu general public license as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 10 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.259525894@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
198 lines
6.0 KiB
C
198 lines
6.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Core driver for the CC770 and AN82527 CAN controllers
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*
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* Copyright (C) 2009, 2011 Wolfgang Grandegger <wg@grandegger.com>
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*/
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#ifndef CC770_DEV_H
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#define CC770_DEV_H
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#include <linux/can/dev.h>
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struct cc770_msgobj {
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u8 ctrl0;
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u8 ctrl1;
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u8 id[4];
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u8 config;
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u8 data[8];
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u8 dontuse; /* padding */
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} __packed;
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struct cc770_regs {
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union {
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struct cc770_msgobj msgobj[16]; /* Message object 1..15 */
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struct {
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u8 control; /* Control Register */
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u8 status; /* Status Register */
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u8 cpu_interface; /* CPU Interface Register */
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u8 dontuse1;
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u8 high_speed_read[2]; /* High Speed Read */
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u8 global_mask_std[2]; /* Standard Global Mask */
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u8 global_mask_ext[4]; /* Extended Global Mask */
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u8 msg15_mask[4]; /* Message 15 Mask */
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u8 dontuse2[15];
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u8 clkout; /* Clock Out Register */
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u8 dontuse3[15];
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u8 bus_config; /* Bus Configuration Register */
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u8 dontuse4[15];
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u8 bit_timing_0; /* Bit Timing Register byte 0 */
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u8 dontuse5[15];
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u8 bit_timing_1; /* Bit Timing Register byte 1 */
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u8 dontuse6[15];
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u8 interrupt; /* Interrupt Register */
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u8 dontuse7[15];
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u8 rx_error_counter; /* Receive Error Counter */
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u8 dontuse8[15];
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u8 tx_error_counter; /* Transmit Error Counter */
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u8 dontuse9[31];
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u8 p1_conf;
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u8 dontuse10[15];
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u8 p2_conf;
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u8 dontuse11[15];
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u8 p1_in;
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u8 dontuse12[15];
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u8 p2_in;
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u8 dontuse13[15];
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u8 p1_out;
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u8 dontuse14[15];
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u8 p2_out;
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u8 dontuse15[15];
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u8 serial_reset_addr;
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};
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};
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} __packed;
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/* Control Register (0x00) */
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#define CTRL_INI 0x01 /* Initialization */
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#define CTRL_IE 0x02 /* Interrupt Enable */
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#define CTRL_SIE 0x04 /* Status Interrupt Enable */
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#define CTRL_EIE 0x08 /* Error Interrupt Enable */
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#define CTRL_EAF 0x20 /* Enable additional functions */
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#define CTRL_CCE 0x40 /* Change Configuration Enable */
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/* Status Register (0x01) */
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#define STAT_LEC_STUFF 0x01 /* Stuff error */
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#define STAT_LEC_FORM 0x02 /* Form error */
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#define STAT_LEC_ACK 0x03 /* Acknowledgement error */
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#define STAT_LEC_BIT1 0x04 /* Bit1 error */
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#define STAT_LEC_BIT0 0x05 /* Bit0 error */
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#define STAT_LEC_CRC 0x06 /* CRC error */
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#define STAT_LEC_MASK 0x07 /* Last Error Code mask */
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#define STAT_TXOK 0x08 /* Transmit Message Successfully */
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#define STAT_RXOK 0x10 /* Receive Message Successfully */
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#define STAT_WAKE 0x20 /* Wake Up Status */
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#define STAT_WARN 0x40 /* Warning Status */
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#define STAT_BOFF 0x80 /* Bus Off Status */
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/*
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* CPU Interface Register (0x02)
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* Clock Out Register (0x1f)
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* Bus Configuration Register (0x2f)
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*
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* see include/linux/can/platform/cc770.h
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*/
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/* Message Control Register 0 (Base Address + 0x0) */
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#define INTPND_RES 0x01 /* No Interrupt pending */
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#define INTPND_SET 0x02 /* Interrupt pending */
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#define INTPND_UNC 0x03
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#define RXIE_RES 0x04 /* Receive Interrupt Disable */
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#define RXIE_SET 0x08 /* Receive Interrupt Enable */
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#define RXIE_UNC 0x0c
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#define TXIE_RES 0x10 /* Transmit Interrupt Disable */
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#define TXIE_SET 0x20 /* Transmit Interrupt Enable */
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#define TXIE_UNC 0x30
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#define MSGVAL_RES 0x40 /* Message Invalid */
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#define MSGVAL_SET 0x80 /* Message Valid */
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#define MSGVAL_UNC 0xc0
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/* Message Control Register 1 (Base Address + 0x01) */
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#define NEWDAT_RES 0x01 /* No New Data */
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#define NEWDAT_SET 0x02 /* New Data */
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#define NEWDAT_UNC 0x03
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#define MSGLST_RES 0x04 /* No Message Lost */
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#define MSGLST_SET 0x08 /* Message Lost */
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#define MSGLST_UNC 0x0c
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#define CPUUPD_RES 0x04 /* No CPU Updating */
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#define CPUUPD_SET 0x08 /* CPU Updating */
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#define CPUUPD_UNC 0x0c
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#define TXRQST_RES 0x10 /* No Transmission Request */
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#define TXRQST_SET 0x20 /* Transmission Request */
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#define TXRQST_UNC 0x30
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#define RMTPND_RES 0x40 /* No Remote Request Pending */
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#define RMTPND_SET 0x80 /* Remote Request Pending */
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#define RMTPND_UNC 0xc0
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/* Message Configuration Register (Base Address + 0x06) */
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#define MSGCFG_XTD 0x04 /* Extended Identifier */
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#define MSGCFG_DIR 0x08 /* Direction is Transmit */
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#define MSGOBJ_FIRST 1
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#define MSGOBJ_LAST 15
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#define CC770_IO_SIZE 0x100
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#define CC770_MAX_IRQ 20 /* max. number of interrupts handled in ISR */
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#define CC770_MAX_MSG 4 /* max. number of messages handled in ISR */
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#define CC770_ECHO_SKB_MAX 1
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#define cc770_read_reg(priv, member) \
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priv->read_reg(priv, offsetof(struct cc770_regs, member))
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#define cc770_write_reg(priv, member, value) \
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priv->write_reg(priv, offsetof(struct cc770_regs, member), value)
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/*
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* Message objects and flags used by this driver
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*/
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#define CC770_OBJ_FLAG_RX 0x01
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#define CC770_OBJ_FLAG_RTR 0x02
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#define CC770_OBJ_FLAG_EFF 0x04
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enum {
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CC770_OBJ_RX0 = 0, /* for receiving normal messages */
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CC770_OBJ_RX1, /* for receiving normal messages */
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CC770_OBJ_RX_RTR0, /* for receiving remote transmission requests */
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CC770_OBJ_RX_RTR1, /* for receiving remote transmission requests */
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CC770_OBJ_TX, /* for sending messages */
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CC770_OBJ_MAX
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};
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#define obj2msgobj(o) (MSGOBJ_LAST - (o)) /* message object 11..15 */
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/*
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* CC770 private data structure
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*/
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struct cc770_priv {
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struct can_priv can; /* must be the first member */
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struct sk_buff *echo_skb;
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/* the lower-layer is responsible for appropriate locking */
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u8 (*read_reg)(const struct cc770_priv *priv, int reg);
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void (*write_reg)(const struct cc770_priv *priv, int reg, u8 val);
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void (*pre_irq)(const struct cc770_priv *priv);
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void (*post_irq)(const struct cc770_priv *priv);
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void *priv; /* for board-specific data */
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struct net_device *dev;
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void __iomem *reg_base; /* ioremap'ed address to registers */
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unsigned long irq_flags; /* for request_irq() */
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unsigned char obj_flags[CC770_OBJ_MAX];
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u8 control_normal_mode; /* Control register for normal mode */
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u8 cpu_interface; /* CPU interface register */
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u8 clkout; /* Clock out register */
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u8 bus_config; /* Bus conffiguration register */
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struct sk_buff *tx_skb;
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};
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struct net_device *alloc_cc770dev(int sizeof_priv);
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void free_cc770dev(struct net_device *dev);
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int register_cc770dev(struct net_device *dev);
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void unregister_cc770dev(struct net_device *dev);
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#endif /* CC770_DEV_H */
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