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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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925d5e4268
Use the new bindings of the Marvell NAND controller driver. Also adapt the NAND controller node organization to distinguish which property is relevant for the controller, and which one is NAND chip specific. Expose the partitions as a subnode of the NAND chip. Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as the new driver activates the arbiter by default for all boards which is either needed or harmless. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
177 lines
3.0 KiB
Plaintext
177 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree file for the Linksys WRT3200ACM (Rango)
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*
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* Copyright (C) 2016 Imre Kaloz <kaloz@openwrt.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "armada-385-linksys.dtsi"
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/ {
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model = "Linksys WRT3200ACM";
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compatible = "linksys,rango", "linksys,armada385", "marvell,armada385",
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"marvell,armada380";
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};
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&expander0 {
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wan_amber@0 {
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label = "rango:amber:wan";
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reg = <0x0>;
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};
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wan_white@1 {
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label = "rango:white:wan";
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reg = <0x1>;
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};
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usb2@5 {
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label = "rango:white:usb2";
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reg = <0x5>;
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};
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usb3_1@6 {
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label = "rango:white:usb3_1";
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reg = <0x6>;
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};
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usb3_2@7 {
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label = "rango:white:usb3_2";
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reg = <0x7>;
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};
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wps_white@8 {
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label = "rango:white:wps";
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reg = <0x8>;
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};
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wps_amber@9 {
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label = "rango:amber:wps";
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reg = <0x9>;
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};
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};
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&gpio_leds {
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power {
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gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
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label = "rango:white:power";
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};
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sata {
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gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
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label = "rango:white:sata";
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};
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wlan_2g {
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gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
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label = "rango:white:wlan_2g";
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};
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wlan_5g {
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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label = "rango:white:wlan_5g";
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};
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};
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&gpio_leds_pins {
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marvell,pins = "mpp21", "mpp45", "mpp46", "mpp56";
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};
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&nand {
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/* AMD/Spansion S34ML02G2 256MiB, OEM Layout */
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0000000 0x200000>; /* 2MiB */
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read-only;
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};
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partition@200000 {
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label = "u_env";
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reg = <0x200000 0x20000>; /* 128KiB */
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};
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partition@220000 {
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label = "s_env";
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reg = <0x220000 0x40000>; /* 256KiB */
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};
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partition@7e0000 {
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label = "devinfo";
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reg = <0x7e0000 0x40000>; /* 256KiB */
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read-only;
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};
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partition@820000 {
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label = "sysdiag";
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reg = <0x820000 0x1e0000>; /* 1920KiB */
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read-only;
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};
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/* kernel1 overlaps with rootfs1 by design */
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partition@a00000 {
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label = "kernel1";
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reg = <0xa00000 0x5000000>; /* 80MiB */
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};
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partition@1000000 {
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label = "rootfs1";
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reg = <0x1000000 0x4a00000>; /* 74MiB */
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};
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/* kernel2 overlaps with rootfs2 by design */
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partition@5a00000 {
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label = "kernel2";
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reg = <0x5a00000 0x5000000>; /* 80MiB */
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};
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partition@6000000 {
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label = "rootfs2";
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reg = <0x6000000 0x4a00000>; /* 74MiB */
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};
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/*
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* 86MiB, last MiB is for the BBT, not writable
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*/
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partition@aa00000 {
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label = "syscfg";
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reg = <0xaa00000 0x5600000>;
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};
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/*
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* Unused area between "s_env" and "devinfo".
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* Moved here because otherwise the renumbered
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* partitions would break the bootloader
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* supplied bootargs
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*/
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partition@180000 {
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label = "unused_area";
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reg = <0x260000 0x5c0000>; /* 5.75MiB */
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};
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};
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};
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&sdhci {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhci_pins>;
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no-1-8-v;
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non-removable;
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wp-inverted;
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bus-width = <8>;
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status = "okay";
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};
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&usb3_1_vbus {
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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&usb3_1_vbus_pins {
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marvell,pins = "mpp44";
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};
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