mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 13:52:22 +07:00
00eb3630a9
Since commit b36581df7e ("spi: imx: Using existing properties for
chipselects") the device tree property 'fsl,spi-num-chipselects' is
unused and it is already marked as obsolete in device tree binding
documentation. Remove the property from the existing DTS files to
avoid its reoccurence on copying.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
197 lines
4.3 KiB
Plaintext
197 lines
4.3 KiB
Plaintext
/*
|
|
* Copyright 2012 Sascha Hauer, Pengutronix
|
|
*
|
|
* The code contained herein is licensed under the GNU General Public
|
|
* License. You may obtain a copy of the GNU General Public License
|
|
* Version 2 or later at the following locations:
|
|
*
|
|
* http://www.opensource.org/licenses/gpl-license.html
|
|
* http://www.gnu.org/copyleft/gpl.html
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "imx27.dtsi"
|
|
|
|
/ {
|
|
model = "Freescale i.MX27 Product Development Kit";
|
|
compatible = "fsl,imx27-pdk", "fsl,imx27";
|
|
|
|
memory {
|
|
reg = <0xa0000000 0x08000000>;
|
|
};
|
|
|
|
usbphy {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
usbphy0: usbphy@0 {
|
|
compatible = "usb-nop-xceiv";
|
|
reg = <0>;
|
|
clocks = <&clks IMX27_CLK_DUMMY>;
|
|
clock-names = "main_clk";
|
|
};
|
|
};
|
|
};
|
|
|
|
&cspi2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_cspi2>;
|
|
cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
|
|
pmic: mc13783@0 {
|
|
compatible = "fsl,mc13783";
|
|
reg = <0>;
|
|
spi-cs-high;
|
|
spi-max-frequency = <1000000>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
regulators {
|
|
vgen_reg: vgen {
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vmmc1_reg: vmmc1 {
|
|
regulator-min-microvolt = <1600000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
gpo1_reg: gpo1 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
gpo3_reg: gpo3 {
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
phy-mode = "mii";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_fec>;
|
|
status = "okay";
|
|
};
|
|
|
|
&kpp {
|
|
linux,keymap = <
|
|
MATRIX_KEY(0, 0, KEY_UP)
|
|
MATRIX_KEY(0, 1, KEY_DOWN)
|
|
MATRIX_KEY(1, 0, KEY_RIGHT)
|
|
MATRIX_KEY(1, 1, KEY_LEFT)
|
|
MATRIX_KEY(1, 2, KEY_ENTER)
|
|
MATRIX_KEY(2, 0, KEY_F6)
|
|
MATRIX_KEY(2, 1, KEY_F8)
|
|
MATRIX_KEY(2, 2, KEY_F9)
|
|
MATRIX_KEY(2, 3, KEY_F10)
|
|
>;
|
|
status = "okay";
|
|
};
|
|
|
|
&nfc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
nand-ecc-mode = "hw";
|
|
nand-on-flash-bbt;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
uart-has-rtscts;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
dr_mode = "otg";
|
|
fsl,usbphy = <&usbphy0>;
|
|
phy_type = "ulpi";
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
imx27-pdk {
|
|
pinctrl_cspi2: cspi2grp {
|
|
fsl,pins = <
|
|
MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
|
|
MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
|
|
MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
|
|
MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
|
|
MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
|
|
>;
|
|
};
|
|
|
|
pinctrl_fec: fecgrp {
|
|
fsl,pins = <
|
|
MX27_PAD_SD3_CMD__FEC_TXD0 0x0
|
|
MX27_PAD_SD3_CLK__FEC_TXD1 0x0
|
|
MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
|
|
MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
|
|
MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
|
|
MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
|
|
MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
|
|
MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
|
|
MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
|
|
MX27_PAD_ATA_DATA7__FEC_MDC 0x0
|
|
MX27_PAD_ATA_DATA8__FEC_CRS 0x0
|
|
MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
|
|
MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
|
|
MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
|
|
MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
|
|
MX27_PAD_ATA_DATA13__FEC_COL 0x0
|
|
MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
|
|
MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
|
|
>;
|
|
};
|
|
|
|
pinctrl_nand: nandgrp {
|
|
fsl,pins = <
|
|
MX27_PAD_NFRB__NFRB 0x0
|
|
MX27_PAD_NFCLE__NFCLE 0x0
|
|
MX27_PAD_NFWP_B__NFWP_B 0x0
|
|
MX27_PAD_NFCE_B__NFCE_B 0x0
|
|
MX27_PAD_NFALE__NFALE 0x0
|
|
MX27_PAD_NFRE_B__NFRE_B 0x0
|
|
MX27_PAD_NFWE_B__NFWE_B 0x0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX27_PAD_UART1_TXD__UART1_TXD 0x0
|
|
MX27_PAD_UART1_RXD__UART1_RXD 0x0
|
|
MX27_PAD_UART1_CTS__UART1_CTS 0x0
|
|
MX27_PAD_UART1_RTS__UART1_RTS 0x0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
|
|
MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
|
|
MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
|
|
MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
|
|
MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
|
|
MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
|
|
MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
|
|
MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
|
|
MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
|
|
MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
|
|
MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
|
|
MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
|
|
>;
|
|
};
|
|
};
|
|
};
|