linux_dsm_epyc7002/drivers/clk/samsung
Stephen Boyd 6df24d0c2f Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-next
- Qualcomm MSM8998 GPU clk controllers
 - Qualcomm SC7180 GCC and RPMH clk controllers
 - Qualcomm QCS404 Q6SSTOP clk controllers
 - Use struct_size() some more in various clk drivers

* clk-ti:
  clk/ti/adpll: allocate room for terminating null
  ARM: dts: omap3: fix DPLL4 M4 divider max value
  clk: ti: divider: convert to use min,max,mask instead of width
  clk: ti: divider: cleanup ti_clk_parse_divider_data API
  clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table
  clk: ti: am43xx: drop idlest polling from gfx clock
  clk: ti: am33xx: drop idlest polling from gfx clock
  clk: ti: am33xx: drop idlest polling from pruss clkctrl clock
  clk: ti: am43xx: drop idlest polling from pruss clkctrl clock
  clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: omap4: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: dra7xx: Drop idlest polling from IPU & DSP clkctrl clocks
  clk: ti: omap5: add IVA subsystem clkctrl data
  dt-bindings: clk: add omap5 iva clkctrl definitions
  clk: ti: clkctrl: add new exported API for checking standby info
  clk: ti: clkctrl: convert to use bit helper macros instead of bitops
  clk: ti: clkctrl: fix setting up clkctrl clocks

* clk-allwinner:
  clk: sunxi-ng: h3: Export MBUS clock
  clk: sunxi-ng: h6: Allow GPU to change parent rate
  clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL

* clk-qcom:
  clk: qcom: rpmh: Reuse sdm845 clks for sm8150
  clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver
  clk: qcom: Allow constant ratio freq tables for rcg
  clk: qcom: smd: Add missing pnoc clock
  clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem
  clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180
  dt-bindings: clock: Introduce RPMHCC bindings for SC7180
  dt-bindings: clock: Add YAML schemas for the QCOM RPMHCC clock bindings
  clk: qcom: Add Global Clock controller (GCC) driver for SC7180
  dt-bindings: clock: Add sc7180 GCC clock binding
  dt-bindings: clock: Add YAML schemas for the QCOM GCC clock bindings
  clk: qcom: common: Return NULL from clk_hw OF provider
  clk: qcom: rcg: update the DFS macro for RCG
  clk: qcom: remove unneeded semicolon
  clk: qcom: Add Q6SSTOP clock controller for QCS404
  dt-bindings: clock: qcom: Add QCOM Q6SSTOP clock controller bindings

* clk-sa:
  drivers/clk: convert VL struct to struct_size

* clk-aspeed:
  clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
  clk: ast2600: Add RMII RCLK gates for all four MACs
  dt-bindings: clock: Add AST2600 RMII RCLK gate definitions
  dt-bindings: clock: Add AST2500 RMII RCLK definitions
2019-11-27 08:14:38 -08:00
..
clk-cpu.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-cpu.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos4.c This round of clk driver and framework updates is heavy on the driver update 2019-07-17 10:07:48 -07:00
clk-exynos5-subcmu.c clk: samsung: Change signature of exynos5_subcmus_init() function 2019-08-08 13:53:42 -07:00
clk-exynos5-subcmu.h clk: samsung: Change signature of exynos5_subcmus_init() function 2019-08-08 13:53:42 -07:00
clk-exynos7.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos3250.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos4412-isp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos5250.c clk: samsung: Change signature of exynos5_subcmus_init() function 2019-08-08 13:53:42 -07:00
clk-exynos5260.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos5260.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos5410.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos5420.c clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path 2019-10-29 14:57:22 +01:00
clk-exynos5433.c clk: samsung: exynos5433: Fix error paths 2019-10-23 18:23:28 +02:00
clk-exynos-audss.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-exynos-clkout.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-pll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-pll.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s3c64xx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s3c2410-dclk.c clk: s3c2410: use devm_platform_ioremap_resource() to simplify code 2019-10-16 16:17:52 -07:00
clk-s3c2410.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s3c2412.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s3c2443.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s5pv210-audss.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-s5pv210.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk.c drivers/clk: convert VL struct to struct_size 2019-11-08 08:36:12 -08:00
clk.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
Kconfig treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile clk: samsung: Remove support for Exynos5440 2018-07-24 18:43:52 +02:00