Christoph Hellwig 5ec9c4ff04 riscv: add ZONE_DMA32 ... This patch allows devices that require memory that can be addressed using 32-bit addresses to work easily on RISC-V systems. The newly improved dma-direct ops will tap into this pool automatically for 32-bit addressing. Based on an earlier patch from Wesley W. Terpstra. CC: Wesley W. Terpstra <terpstra@sifive.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-01-30 19:14:27 -08:00
..
cacheflush.c	RISC-V: Flush I$ when making a dirty page executable	2017-11-30 12:58:25 -08:00
extable.c	RISC-V: ELF and module implementation	2017-09-26 15:26:46 -07:00
fault.c	riscv: rename SR_* constants to match the spec	2018-01-07 15:14:39 -08:00
init.c	riscv: add ZONE_DMA32	2018-01-30 19:14:27 -08:00
ioremap.c	RISC-V: io.h: type fixes for warnings	2017-11-30 10:01:10 -08:00
Makefile	RISC-V: Flush I$ when making a dirty page executable	2017-11-30 12:58:25 -08:00