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fc1c72ebb4
Keystone2 Lamarr (K2L) is a dual Cortex A15 core based SoC with 4 DSPs. It has standard peripherals such as i2c, spi, uart, timer, pcie etc., similar to k2hk, but different set of wireless hardware. This patch add support for k2 Lamarr SoC and EVM. This re-uses the common keystone.dtsi to include common bindings across the various k2 devices. Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
56 lines
1.1 KiB
Plaintext
56 lines
1.1 KiB
Plaintext
/*
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* Copyright 2014 Texas Instruments, Inc.
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*
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* Keystone 2 Lamarr SoC specific device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&gic>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <1>;
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};
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};
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soc {
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/include/ "k2l-clocks.dtsi"
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uart2: serial@02348400 {
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compatible = "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02348400 0x100>;
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clocks = <&clkuart2>;
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interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
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};
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uart3: serial@02348800 {
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compatible = "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02348800 0x100>;
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clocks = <&clkuart3>;
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interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
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};
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};
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};
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