mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8ff3afc159
It's very convenient to have fatal signals enabled on developemnt platform as this allows to catch problems that happen early in user-space (like crashing init or dynamic loader). Otherwise we may either enable it later from alive taregt console by "echo 1 > /proc/sys/kernel/print-fatal-signals" but: 1. We might be unfortunate enough to not reach working console 2. Forget to enable fatal signals and miss something interesting Given we're talking about development platforms here it shouldn't be a problem if a bit more data gets printed to debug console. Moreover this makes behavior of all our dev platforms predictable as today some platforms already have it enabled and some don't - which is way too inconvenient. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
102 lines
2.2 KiB
Plaintext
102 lines
2.2 KiB
Plaintext
/*
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* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "skeleton_hs_idu.dtsi"
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/ {
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model = "snps,nsimosci_hs-smp";
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compatible = "snps,nsimosci_hs";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&core_intc>;
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chosen {
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/* this is for console on serial */
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bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1";
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};
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aliases {
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serial0 = &uart0;
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};
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fpga {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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/* child and parent address space 1:1 mapped */
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ranges;
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core_clk: core_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <5000000>;
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};
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core_intc: core-interrupt-controller {
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compatible = "snps,archs-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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idu_intc: idu-interrupt-controller {
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compatible = "snps,archs-idu-intc";
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interrupt-controller;
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interrupt-parent = <&core_intc>;
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#interrupt-cells = <1>;
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};
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uart0: serial@f0000000 {
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compatible = "ns8250";
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reg = <0xf0000000 0x2000>;
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interrupt-parent = <&idu_intc>;
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interrupts = <0>;
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clock-frequency = <3686400>;
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baud = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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no-loopback-test = <1>;
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};
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pguclk: pguclk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <25175000>;
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};
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pgu@f9000000 {
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compatible = "snps,arcpgu";
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reg = <0xf9000000 0x400>;
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clocks = <&pguclk>;
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clock-names = "pxlclk";
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};
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ps2: ps2@f9001000 {
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compatible = "snps,arc_ps2";
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reg = <0xf9000400 0x14>;
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interrupts = <3>;
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interrupt-parent = <&idu_intc>;
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interrupt-names = "arc_ps2_irq";
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};
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eth0: ethernet@f0003000 {
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compatible = "ezchip,nps-mgt-enet";
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reg = <0xf0003000 0x44>;
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interrupt-parent = <&idu_intc>;
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interrupts = <1>;
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};
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arcpct0: pct {
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compatible = "snps,archs-pct";
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#interrupt-cells = <1>;
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interrupts = <20>;
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};
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};
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};
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