mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-16 23:56:50 +07:00
ea584595fc
cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during e.g. reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUNOr0AAoJEEEQszewGV1z9toP/2ISXRnsi3+jlqVmEGm/y6EA PPwJOiYnOhZR2/fTCHIF0PNbIi9pw7xKnzxttYCu4uCz7geHX+FfTwUZ2/KWMfqi ZJ9kEoOVVKzKjmL/m2a2tO4IRSBHqJ8dF3yvaNjS3AL7EDfG6F5STErQurdLEynK SeJZ2OwM/vRFCac6F7oDlqAUTu3xYGbVD8+zI0H0V/ReocosFlEwcbl2S8ctDWUd h98M+gY+A8rxkvVMnmQ/k7rUTme/glDQ3z5xVx+uHbS2/a5M1jSM/71cXE6YnSrR it0CK7CHomq2RzHsKf7oH7GD4kFkukMwFKeMoqz75JWz3352VZPTF53chCIqRSgO hrgGwZ7WF6pUUUhsn1ZdZsnBPA2Fou2uwslyLSAiE+OYEH2/NSVIOUcorjQcWqU/ 0Kix5yb8X1ZzRMhR+TVrTD5V0jguqp2buXq+0P2XlU6MoO2vy7iNf2eXvPg8sF8C anjTCKgmkzy7eyT2uzfDaNZAyfSBKb1TiKiR9zA0SRChJkCi1ErJEXDGeHiptvSA +D2k68Ils2LqsvdrnEd2XvVFMllh0iq7b+16o7D+Els0WRbnHpfYCaqfOuF5F4U0 SmeyI0ruawNDc5e9EBKXstt0/R9AMOetyTcTu29U2ZVo90zGaT1ofT8+R1jJ0kGa bPARJZrgecgv1E9Qnnnd =8InA -----END PGP SIGNATURE----- Merge tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ...
188 lines
6.4 KiB
C
188 lines
6.4 KiB
C
#ifndef __LINUX_GPIO_DRIVER_H
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#define __LINUX_GPIO_DRIVER_H
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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struct device;
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struct gpio_desc;
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struct of_phandle_args;
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struct device_node;
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struct seq_file;
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#ifdef CONFIG_GPIOLIB
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/**
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* struct gpio_chip - abstract a GPIO controller
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* @label: for diagnostics
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* @dev: optional device providing the GPIOs
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* @owner: helps prevent removal of modules exporting active GPIOs
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* @list: links gpio_chips together for traversal
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* @request: optional hook for chip-specific activation, such as
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* enabling module power and clock; may sleep
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* @free: optional hook for chip-specific deactivation, such as
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* disabling module power and clock; may sleep
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* @get_direction: returns direction for signal "offset", 0=out, 1=in,
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* (same as GPIOF_DIR_XXX), or negative error
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* @direction_input: configures signal "offset" as input, or returns error
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* @direction_output: configures signal "offset" as output, or returns error
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* @get: returns value for signal "offset"; for output signals this
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* returns either the value actually sensed, or zero
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* @set: assigns output value for signal "offset"
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* @set_debounce: optional hook for setting debounce time for specified gpio in
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* interrupt triggered gpio chips
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* @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
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* implementation may not sleep
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* @dbg_show: optional routine to show contents in debugfs; default code
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* will be used when this is omitted, but custom code can show extra
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* state (such as pullup/pulldown configuration).
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* @base: identifies the first GPIO number handled by this chip; or, if
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* negative during registration, requests dynamic ID allocation.
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* @ngpio: the number of GPIOs handled by this controller; the last GPIO
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* handled is (base + ngpio - 1).
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* @desc: array of ngpio descriptors. Private.
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* @names: if set, must be an array of strings to use as alternative
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* names for the GPIOs in this chip. Any entry in the array
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* may be NULL if there is no alias for the GPIO, however the
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* array must be @ngpio entries long. A name can include a single printk
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* format specifier for an unsigned int. It is substituted by the actual
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* number of the gpio.
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* @can_sleep: flag must be set iff get()/set() methods sleep, as they
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* must while accessing GPIO expander chips over I2C or SPI. This
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* implies that if the chip supports IRQs, these IRQs need to be threaded
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* as the chip access may sleep when e.g. reading out the IRQ status
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* registers.
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* @exported: flags if the gpiochip is exported for use from sysfs. Private.
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* @irq_not_threaded: flag must be set if @can_sleep is set but the
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* IRQs don't need to be threaded
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*
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* A gpio_chip can help platforms abstract various sources of GPIOs so
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* they can all be accessed through a common programing interface.
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* Example sources would be SOC controllers, FPGAs, multifunction
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* chips, dedicated GPIO expanders, and so on.
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*
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* Each chip controls a number of signals, identified in method calls
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* by "offset" values in the range 0..(@ngpio - 1). When those signals
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* are referenced through calls like gpio_get_value(gpio), the offset
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* is calculated by subtracting @base from the gpio number.
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*/
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struct gpio_chip {
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const char *label;
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struct device *dev;
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struct module *owner;
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struct list_head list;
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int (*request)(struct gpio_chip *chip,
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unsigned offset);
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void (*free)(struct gpio_chip *chip,
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unsigned offset);
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int (*get_direction)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_input)(struct gpio_chip *chip,
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unsigned offset);
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int (*direction_output)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*get)(struct gpio_chip *chip,
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unsigned offset);
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void (*set)(struct gpio_chip *chip,
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unsigned offset, int value);
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int (*set_debounce)(struct gpio_chip *chip,
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unsigned offset,
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unsigned debounce);
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int (*to_irq)(struct gpio_chip *chip,
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unsigned offset);
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void (*dbg_show)(struct seq_file *s,
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struct gpio_chip *chip);
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int base;
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u16 ngpio;
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struct gpio_desc *desc;
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const char *const *names;
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bool can_sleep;
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bool irq_not_threaded;
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bool exported;
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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/*
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* With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
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* to handle IRQs for most practical cases.
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*/
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struct irq_chip *irqchip;
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struct irq_domain *irqdomain;
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unsigned int irq_base;
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irq_flow_handler_t irq_handler;
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unsigned int irq_default_type;
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#endif
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#if defined(CONFIG_OF_GPIO)
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/*
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* If CONFIG_OF is enabled, then all GPIO controllers described in the
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* device tree automatically may have an OF translation
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*/
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struct device_node *of_node;
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int of_gpio_n_cells;
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int (*of_xlate)(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec, u32 *flags);
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#endif
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#ifdef CONFIG_PINCTRL
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/*
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* If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
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* describe the actual pin range which they serve in an SoC. This
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* information would be used by pinctrl subsystem to configure
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* corresponding pins for gpio usage.
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*/
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struct list_head pin_ranges;
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#endif
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};
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extern const char *gpiochip_is_requested(struct gpio_chip *chip,
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unsigned offset);
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/* add/remove chips */
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extern int gpiochip_add(struct gpio_chip *chip);
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extern void gpiochip_remove(struct gpio_chip *chip);
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extern struct gpio_chip *gpiochip_find(void *data,
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int (*match)(struct gpio_chip *chip, void *data));
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/* lock/unlock as IRQ */
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int gpio_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
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void gpio_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
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struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
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struct irq_chip *irqchip,
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int parent_irq,
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irq_flow_handler_t parent_handler);
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int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type);
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#endif /* CONFIG_GPIOLIB_IRQCHIP */
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struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
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const char *label);
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void gpiochip_free_own_desc(struct gpio_desc *desc);
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#else /* CONFIG_GPIOLIB */
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static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
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{
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/* GPIO can never have been requested */
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WARN_ON(1);
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return ERR_PTR(-ENODEV);
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}
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#endif /* CONFIG_GPIOLIB */
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#endif
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