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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5e12a613ce
The Armada 370/XP SoC family has a completely configurable address space handled by the MBus controller. This patch introduces the device tree layout of MBus, making the 'soc' node as mbus-compatible. Since every peripheral/controller is a child of this 'soc' node, this makes all of them sit behind the mbus, thus describing the hardware accurately. A translation entry has been added for the internal-regs mapping. This can't be done in the common armada-370-xp.dtsi because A370 and AXP have different addressing width. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
144 lines
2.6 KiB
Plaintext
144 lines
2.6 KiB
Plaintext
/*
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* Device Tree file for Globalscale Mirabox
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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#include "armada-370.dtsi"
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/ {
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model = "Globalscale Mirabox";
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compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;
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internal-regs {
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serial@12000 {
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clock-frequency = <200000000>;
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status = "okay";
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};
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timer@20300 {
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clock-frequency = <600000000>;
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status = "okay";
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};
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pinctrl {
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pwr_led_pin: pwr-led-pin {
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marvell,pins = "mpp63";
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marvell,function = "gpo";
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};
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stat_led_pins: stat-led-pins {
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marvell,pins = "mpp64", "mpp65";
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marvell,function = "gpio";
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};
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};
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gpio_leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
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green_pwr_led {
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label = "mirabox:green:pwr";
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gpios = <&gpio1 31 1>;
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linux,default-trigger = "heartbeat";
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};
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blue_stat_led {
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label = "mirabox:blue:stat";
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gpios = <&gpio2 0 1>;
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linux,default-trigger = "cpu0";
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};
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green_stat_led {
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label = "mirabox:green:stat";
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gpios = <&gpio2 1 1>;
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default-state = "off";
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};
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};
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mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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reg = <1>;
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};
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};
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ethernet@70000 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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ethernet@74000 {
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status = "okay";
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phy = <&phy1>;
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phy-mode = "rgmii-id";
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};
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mvsdio@d4000 {
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pinctrl-0 = <&sdio_pins3>;
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pinctrl-names = "default";
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status = "okay";
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/*
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* No CD or WP GPIOs: SDIO interface used for
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* Wifi/Bluetooth chip
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*/
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broken-cd;
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};
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usb@50000 {
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status = "okay";
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};
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usb@51000 {
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status = "okay";
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};
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i2c@11000 {
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status = "okay";
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clock-frequency = <100000>;
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pca9505: pca9505@25 {
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compatible = "nxp,pca9505";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x25>;
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};
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};
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pcie-controller {
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status = "okay";
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/* Internal mini-PCIe connector */
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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/* Connected on the PCB to a USB 3.0 XHCI controller */
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pcie@2,0 {
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/* Port 1, Lane 0 */
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status = "okay";
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};
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};
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};
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};
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};
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