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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4a13b3bec3
The Zii Ultra design, also known as RDU3, is the i.MX8M based successor to the the i.MX6 based RDU2. This adds the basic board support for all components which are supported by the upstream kernel at this time. The board comes in 2 different versions, called RMB3 and Zest, which are derived from the same design, but have different layouts and a few small differences in the populated components. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
96 lines
1.7 KiB
Plaintext
96 lines
1.7 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2019 Zodiac Inflight Innovations
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*/
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/dts-v1/;
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#include "imx8mq-zii-ultra.dtsi"
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/ {
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model = "ZII i.MX8MQ Ultra RMB3 Board";
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compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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nor_flash: flash@0 {
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compatible = "st,n25q128a13", "jedec,spi-nor";
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&i2c2 {
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temp-sense@48 {
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compatible = "national,lm75";
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reg = <0x48>;
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};
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};
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&i2c4 {
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touchscreen@20 {
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compatible = "syna,rmi4-i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ts>;
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reg = <0x20>;
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interrupt-parent = <&gpio1>;
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interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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rmi4-f01@1 {
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reg = <0x1>;
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syna,nosleep-mode = <2>;
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};
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rmi4-f11@11 {
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reg = <0x11>;
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touchscreen-inverted-x;
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touchscreen-swapped-x-y;
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syna,sensor-type = <1>;
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};
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rmi4-f12@12 {
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reg = <0x12>;
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touchscreen-inverted-x;
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touchscreen-swapped-x-y;
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syna,sensor-type = <1>;
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};
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};
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touchscreen@2a {
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compatible = "eeti,exc3000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ts>;
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reg = <0x2a>;
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interrupt-parent = <&gpio1>;
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interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
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touchscreen-inverted-x;
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touchscreen-swapped-x-y;
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status = "disabled";
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};
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};
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&usbhub {
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swap-dx-lanes = <0>;
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};
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&iomuxc {
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
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MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82
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MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82
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MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
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>;
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};
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};
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