Jonathan Marek 5dcbc71126 phy: qcom-qmp: Allow different values for second lane ... The primary USB PHY on sm8250 sets some values differently for the second lane. This makes it possible to represent that. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20200524021416.17049-2-jonathan@marek.ca Signed-off-by: Vinod Koul <vkoul@kernel.org>		2020-06-29 15:11:33 +05:30
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allwinner	phy: exynos: Rename Exynos to lowercase	2020-06-24 22:44:19 +05:30
amlogic
broadcom
cadence
freescale
hisilicon
intel
lantiq
marvell
mediatek
motorola
mscc
qualcomm	phy: qcom-qmp: Allow different values for second lane	2020-06-29 15:11:33 +05:30
ralink
renesas
rockchip
samsung	phy: exynos: Rename Exynos to lowercase	2020-06-24 22:44:19 +05:30
socionext
st
tegra
ti
Kconfig
Makefile
phy-core-mipi-dphy.c
phy-core.c
phy-lpc18xx-usb-otg.c
phy-pistachio-usb.c
phy-xgene.c