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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 07:57:03 +07:00
5d8d349618
As A20 is designed as a pin-compatible upgrade of A10, their pin controller are very similar, and can share one driver. Add A20 support to the A10 driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
81 lines
1.4 KiB
Plaintext
81 lines
1.4 KiB
Plaintext
if ARCH_SUNXI
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config PINCTRL_SUNXI
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bool
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select PINMUX
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select GENERIC_PINCONF
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select GPIOLIB
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config PINCTRL_SUN4I_A10
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def_bool MACH_SUN4I || MACH_SUN7I
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select PINCTRL_SUNXI
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config PINCTRL_SUN5I
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def_bool MACH_SUN5I
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select PINCTRL_SUNXI
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config PINCTRL_SUN6I_A31
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def_bool MACH_SUN6I
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select PINCTRL_SUNXI
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config PINCTRL_SUN6I_A31_R
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def_bool MACH_SUN6I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN7I_A20
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bool
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A23
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A33
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A83T
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_A23_R
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def_bool MACH_SUN8I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_H3
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_H3_R
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def_bool MACH_SUN8I || (ARM64 && ARCH_SUNXI)
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select PINCTRL_SUNXI
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config PINCTRL_SUN8I_V3S
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def_bool MACH_SUN8I
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select PINCTRL_SUNXI
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config PINCTRL_SUN9I_A80
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def_bool MACH_SUN9I
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select PINCTRL_SUNXI
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config PINCTRL_SUN9I_A80_R
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def_bool MACH_SUN9I
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depends on RESET_CONTROLLER
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_A64
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_A64_R
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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config PINCTRL_SUN50I_H5
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def_bool ARM64 && ARCH_SUNXI
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select PINCTRL_SUNXI
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endif
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