Daniele Ceraolo Spurio 5d64c120c0 drm/i915/guc: limit forcewake to blitter domain in guc_send ... The forcewake_get call in the guc_send_mmio function was added to avoid getting and releasing forcewake on each register access. While this makes sense, all GuC registers are in the blitter range so no need to wake all the wells. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1490366919-34715-1-git-send-email-daniele.ceraolospurio@intel.com Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>		2017-03-24 15:57:09 +00:00
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drm	drm/i915/guc: limit forcewake to blitter domain in guc_send	2017-03-24 15:57:09 +00:00
host1x	gpu: host1x: Set OF node for new host1x devices	2017-01-30 11:47:44 +01:00
ipu-v3	gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent	2017-03-16 10:14:49 +01:00
vga	Pointer for Markus's image conversion work.	2017-03-14 15:07:33 +01:00
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