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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8b5b9adbff
Each setup stage will prepare status stage at cdns3_ep0_setup_phase, it doesn't need to add extra status stage for test mode handling, otherwise, the controller can't enter the test mode. Through the Lecroy bus analyzer log, the controller will always wait status stage even it is prepared by software later than the test mode is set by software. If we comment out the status stage at cdns3_ep0_setup_phase, the controller will not enter test mode even the test mode is set beforehand. Reviewed-by: Pawel Laszczak <pawell@cadence.com> Signed-off-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Felipe Balbi <balbi@kernel.org> |
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| .. | ||
| cdns3-imx.c | ||
| cdns3-pci-wrap.c | ||
| cdns3-ti.c | ||
| core.c | ||
| core.h | ||
| debug.h | ||
| drd.c | ||
| drd.h | ||
| ep0.c | ||
| gadget-export.h | ||
| gadget.c | ||
| gadget.h | ||
| host-export.h | ||
| host.c | ||
| Kconfig | ||
| Makefile | ||
| trace.c | ||
| trace.h | ||