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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6c5bffa80e
The equivalent of both of these are now done via macro magic when the relevant register calls are made. The actual structure elements will shortly go away. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
266 lines
6.8 KiB
C
266 lines
6.8 KiB
C
/**
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* IIO driver for the 3-axis accelerometer Domintech ARD10.
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*
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* Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com>
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* Copyright (c) 2012 Domintech Technology Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/byteorder/generic.h>
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#define DMARD10_REG_ACTR 0x00
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#define DMARD10_REG_AFEM 0x0c
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#define DMARD10_REG_STADR 0x12
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#define DMARD10_REG_STAINT 0x1c
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#define DMARD10_REG_MISC2 0x1f
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#define DMARD10_REG_PD 0x21
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#define DMARD10_MODE_OFF 0x00
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#define DMARD10_MODE_STANDBY 0x02
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#define DMARD10_MODE_ACTIVE 0x06
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#define DMARD10_MODE_READ_OTP 0x12
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#define DMARD10_MODE_RESET_DATA_PATH 0x82
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/* AFEN set 1, ATM[2:0]=b'000 (normal), EN_Z/Y/X/T=1 */
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#define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f
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/* ODR[3:0]=b'0111 (100Hz), CCK[3:0]=b'0100 (204.8kHZ) */
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#define DMARD10_VALUE_CKSEL_ODR_100_204 0x74
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/* INTC[6:5]=b'00 */
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#define DMARD10_VALUE_INTC 0x00
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/* TAP1/TAP2 Average 2 */
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#define DMARD10_VALUE_TAPNS_AVE_2 0x11
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#define DMARD10_VALUE_STADR 0x55
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#define DMARD10_VALUE_STAINT 0xaa
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#define DMARD10_VALUE_MISC2_OSCA_EN 0x08
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#define DMARD10_VALUE_PD_RST 0x52
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/* Offsets into the buffer read in dmard10_read_raw() */
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#define DMARD10_X_OFFSET 1
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#define DMARD10_Y_OFFSET 2
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#define DMARD10_Z_OFFSET 3
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/*
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* a value of + or -128 corresponds to + or - 1G
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* scale = 9.81 / 128 = 0.076640625
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*/
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static const int dmard10_nscale = 76640625;
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#define DMARD10_CHANNEL(reg, axis) { \
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.type = IIO_ACCEL, \
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.address = reg, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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}
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static const struct iio_chan_spec dmard10_channels[] = {
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DMARD10_CHANNEL(DMARD10_X_OFFSET, X),
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DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y),
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DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z),
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};
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struct dmard10_data {
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struct i2c_client *client;
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};
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/* Init sequence taken from the android driver */
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static int dmard10_reset(struct i2c_client *client)
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{
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unsigned char buffer[7];
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int ret;
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/* 1. Powerdown reset */
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ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD,
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DMARD10_VALUE_PD_RST);
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if (ret < 0)
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return ret;
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/*
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* 2. ACTR => Standby mode => Download OTP to parameter reg =>
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* Standby mode => Reset data path => Standby mode
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*/
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buffer[0] = DMARD10_REG_ACTR;
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buffer[1] = DMARD10_MODE_STANDBY;
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buffer[2] = DMARD10_MODE_READ_OTP;
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buffer[3] = DMARD10_MODE_STANDBY;
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buffer[4] = DMARD10_MODE_RESET_DATA_PATH;
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buffer[5] = DMARD10_MODE_STANDBY;
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ret = i2c_master_send(client, buffer, 6);
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if (ret < 0)
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return ret;
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/* 3. OSCA_EN = 1, TSTO = b'000 (INT1 = normal, TEST0 = normal) */
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ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2,
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DMARD10_VALUE_MISC2_OSCA_EN);
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if (ret < 0)
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return ret;
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/* 4. AFEN = 1 (AFE will powerdown after ADC) */
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buffer[0] = DMARD10_REG_AFEM;
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buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL;
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buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204;
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buffer[3] = DMARD10_VALUE_INTC;
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buffer[4] = DMARD10_VALUE_TAPNS_AVE_2;
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buffer[5] = 0x00; /* DLYC, no delay timing */
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buffer[6] = 0x07; /* INTD=1 push-pull, INTA=1 active high, AUTOT=1 */
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ret = i2c_master_send(client, buffer, 7);
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if (ret < 0)
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return ret;
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/* 5. Activation mode */
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ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR,
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DMARD10_MODE_ACTIVE);
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if (ret < 0)
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return ret;
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return 0;
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}
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/* Shutdown sequence taken from the android driver */
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static int dmard10_shutdown(struct i2c_client *client)
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{
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unsigned char buffer[3];
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buffer[0] = DMARD10_REG_ACTR;
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buffer[1] = DMARD10_MODE_STANDBY;
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buffer[2] = DMARD10_MODE_OFF;
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return i2c_master_send(client, buffer, 3);
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}
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static int dmard10_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct dmard10_data *data = iio_priv(indio_dev);
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__le16 buf[4];
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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/*
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* Read 8 bytes starting at the REG_STADR register, trying to
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* read the individual X, Y, Z registers will always read 0.
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*/
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ret = i2c_smbus_read_i2c_block_data(data->client,
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DMARD10_REG_STADR,
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sizeof(buf), (u8 *)buf);
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if (ret < 0)
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return ret;
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ret = le16_to_cpu(buf[chan->address]);
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*val = sign_extend32(ret, 12);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 0;
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*val2 = dmard10_nscale;
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return IIO_VAL_INT_PLUS_NANO;
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info dmard10_info = {
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.read_raw = dmard10_read_raw,
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};
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static int dmard10_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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int ret;
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struct iio_dev *indio_dev;
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struct dmard10_data *data;
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/* These 2 registers have special POR reset values used for id */
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ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR);
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if (ret != DMARD10_VALUE_STADR)
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return (ret < 0) ? ret : -ENODEV;
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ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT);
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if (ret != DMARD10_VALUE_STAINT)
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return (ret < 0) ? ret : -ENODEV;
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indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
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if (!indio_dev) {
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dev_err(&client->dev, "iio allocation failed!\n");
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return -ENOMEM;
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}
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data = iio_priv(indio_dev);
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data->client = client;
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i2c_set_clientdata(client, indio_dev);
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indio_dev->dev.parent = &client->dev;
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indio_dev->info = &dmard10_info;
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indio_dev->name = "dmard10";
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = dmard10_channels;
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indio_dev->num_channels = ARRAY_SIZE(dmard10_channels);
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ret = dmard10_reset(client);
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if (ret < 0)
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return ret;
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ret = iio_device_register(indio_dev);
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if (ret < 0) {
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dev_err(&client->dev, "device_register failed\n");
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dmard10_shutdown(client);
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}
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return ret;
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}
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static int dmard10_remove(struct i2c_client *client)
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{
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struct iio_dev *indio_dev = i2c_get_clientdata(client);
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iio_device_unregister(indio_dev);
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return dmard10_shutdown(client);
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}
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#ifdef CONFIG_PM_SLEEP
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static int dmard10_suspend(struct device *dev)
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{
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return dmard10_shutdown(to_i2c_client(dev));
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}
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static int dmard10_resume(struct device *dev)
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{
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return dmard10_reset(to_i2c_client(dev));
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}
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#endif
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static SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend, dmard10_resume);
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static const struct i2c_device_id dmard10_i2c_id[] = {
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{"dmard10", 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, dmard10_i2c_id);
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static struct i2c_driver dmard10_driver = {
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.driver = {
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.name = "dmard10",
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.pm = &dmard10_pm_ops,
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},
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.probe = dmard10_probe,
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.remove = dmard10_remove,
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.id_table = dmard10_i2c_id,
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};
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module_i2c_driver(dmard10_driver);
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MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
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MODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver");
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MODULE_LICENSE("GPL v2");
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