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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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46d987af76
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUIz0kAAoJEFDCiBxwnmDrtDgP/2eE5SB69qzwpIyCT2B5xMM/ c7JdY+PFb0YS9N3mgf1m0nKm49eCkx2N6I4rkSsRlCdBBcqBQVG2BhoBK+Ri8urr UO1TALY1ydnuuyAn5FUV2jNS0oyP4I1bmy5Eis2OCbsWsz++iKWBz40hsXK7xgE3 6mOSECd7IQE5/xY3BnF1XjhzLK9tEHcrVgBHOvGTYDwB+4F0Ex834hmB1rlUJvD1 lZOujr8CrgO3EdH4FzaGd+Z53qQYvbV4t0zDoBTTwik+/m9zGo9L7KbSJNyyN7Ed 2+RfFIWlq1U1ufsxVs2q66WxhFwCW105rjFOQQiNilVyGM3FWJbYopB/fMxCiEgl kwsh8Ebzj/UAJsLnSmodH1xHsqpe8bqkeIQikz02a8DL9Su37PB6w0EqXeZYAbiL L9S65JFpVp6zpOzVHZ0iH/0drOuyAKYm8Rk/ePaz8LL6tTUSqBPI2PWACvgUO9Ac hU3nZTM0dWekOBtiEfTZ5yTwehWvzyAGT6FweoQZ7phgPAO1dgYQjinFYFRK5iFO Th4Wr69WIbfdfosAhRi3S3WTRZMngavjIsuP2V8seTHXwG5QSUWWp+mrbi3cup0d O23t2bT9A3D8q1OuvwuvBy5r8I1j18HxoqbvPlkrMQPfMr5xdZwEx7qM7bFz1So7 LSRSBZlBkXOmMosBz21D =DaIm -----END PGP SIGNATURE----- Merge tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux into drm-next IPUv3 fixes for v3.18 * tag 'ipu-fixes-3.18' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: Kconfig: Remove SOC_IMX6SL from IMX_IPUV3_CORE Kconfig gpu: ipu-v3: ipu-smfc: Do not leave DEBUG defined gpu: ipu-v3: Return proper error on ipu_add_client_devices error path gpu: ipu-v3: Select GENERIC_IRQ_CHIP to fix build error
209 lines
4.3 KiB
C
209 lines
4.3 KiB
C
/*
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* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <video/imx-ipu-v3.h>
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#include "ipu-prv.h"
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struct ipu_smfc {
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struct ipu_smfc_priv *priv;
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int chno;
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bool inuse;
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};
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struct ipu_smfc_priv {
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void __iomem *base;
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spinlock_t lock;
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struct ipu_soc *ipu;
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struct ipu_smfc channel[4];
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int use_count;
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};
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/*SMFC Registers */
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#define SMFC_MAP 0x0000
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#define SMFC_WMC 0x0004
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#define SMFC_BS 0x0008
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int ipu_smfc_set_burstsize(struct ipu_smfc *smfc, int burstsize)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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u32 val, shift;
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spin_lock_irqsave(&priv->lock, flags);
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shift = smfc->chno * 4;
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val = readl(priv->base + SMFC_BS);
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val &= ~(0xf << shift);
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val |= burstsize << shift;
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writel(val, priv->base + SMFC_BS);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_set_burstsize);
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int ipu_smfc_map_channel(struct ipu_smfc *smfc, int csi_id, int mipi_id)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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u32 val, shift;
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spin_lock_irqsave(&priv->lock, flags);
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shift = smfc->chno * 3;
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val = readl(priv->base + SMFC_MAP);
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val &= ~(0x7 << shift);
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val |= ((csi_id << 2) | mipi_id) << shift;
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writel(val, priv->base + SMFC_MAP);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_map_channel);
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int ipu_smfc_set_watermark(struct ipu_smfc *smfc, u32 set_level, u32 clr_level)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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u32 val, shift;
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spin_lock_irqsave(&priv->lock, flags);
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shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0);
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val = readl(priv->base + SMFC_WMC);
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val &= ~(0x3f << shift);
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val |= ((clr_level << 3) | set_level) << shift;
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writel(val, priv->base + SMFC_WMC);
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_set_watermark);
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int ipu_smfc_enable(struct ipu_smfc *smfc)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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if (!priv->use_count)
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ipu_module_enable(priv->ipu, IPU_CONF_SMFC_EN);
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priv->use_count++;
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_enable);
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int ipu_smfc_disable(struct ipu_smfc *smfc)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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priv->use_count--;
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if (!priv->use_count)
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ipu_module_disable(priv->ipu, IPU_CONF_SMFC_EN);
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if (priv->use_count < 0)
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priv->use_count = 0;
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spin_unlock_irqrestore(&priv->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_disable);
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struct ipu_smfc *ipu_smfc_get(struct ipu_soc *ipu, unsigned int chno)
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{
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struct ipu_smfc_priv *priv = ipu->smfc_priv;
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struct ipu_smfc *smfc, *ret;
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unsigned long flags;
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if (chno >= 4)
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return ERR_PTR(-EINVAL);
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smfc = &priv->channel[chno];
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ret = smfc;
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spin_lock_irqsave(&priv->lock, flags);
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if (smfc->inuse) {
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ret = ERR_PTR(-EBUSY);
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goto unlock;
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}
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smfc->inuse = true;
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unlock:
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spin_unlock_irqrestore(&priv->lock, flags);
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return ret;
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_get);
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void ipu_smfc_put(struct ipu_smfc *smfc)
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{
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struct ipu_smfc_priv *priv = smfc->priv;
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unsigned long flags;
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spin_lock_irqsave(&priv->lock, flags);
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smfc->inuse = false;
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spin_unlock_irqrestore(&priv->lock, flags);
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}
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EXPORT_SYMBOL_GPL(ipu_smfc_put);
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int ipu_smfc_init(struct ipu_soc *ipu, struct device *dev,
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unsigned long base)
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{
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struct ipu_smfc_priv *priv;
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int i;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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ipu->smfc_priv = priv;
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spin_lock_init(&priv->lock);
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priv->ipu = ipu;
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priv->base = devm_ioremap(dev, base, PAGE_SIZE);
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if (!priv->base)
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return -ENOMEM;
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for (i = 0; i < 4; i++) {
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priv->channel[i].priv = priv;
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priv->channel[i].chno = i;
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}
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pr_debug("%s: ioremap 0x%08lx -> %p\n", __func__, base, priv->base);
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return 0;
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}
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void ipu_smfc_exit(struct ipu_soc *ipu)
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{
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}
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