Liu Ying 5ccc248cc5 ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate ... The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock, according to the i.MX6q/sdl reference manuals. This clock is actually the gate for several clocks, including the hsi_tx_sel clock's output and the video_27m clock's output. The MIPI DSI host controller embedded in the i.MX6q/sdl SoCs uses the video_27m clock to generate PLL reference clock and MIPI core configuration clock. In order to gate/ungate the two MIPI DSI host controller relevant clocks, this patch adds the mipi_core_cfg clock as a shared clock gate. Suggested-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>		2015-03-02 20:52:13 +08:00
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arm
clk
clock	ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate	2015-03-02 20:52:13 +08:00
dma	ARM: sunxi: DT: Convert the DTs to use a header for the DMA arguments	2015-01-21 09:58:56 +01:00
gpio	pinctrl: add driver for Amlogic Meson SoCs	2015-01-26 09:13:00 +01:00
iio	DT: iio: vadc: document dt binding	2015-01-28 18:42:00 +00:00
input
interrupt-controller	ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/	2015-01-13 13:48:16 -06:00
memory
mfd	mfd: devicetree: bindings: Add Qualcomm RPM DT binding	2015-01-22 16:03:57 +00:00
phy
pinctrl	Allwinner device tree changes for 3.20	2015-01-26 20:24:47 -08:00
pwm
regulator
reset
reset-controller
soc
sound	ASoC: samsung: i2s: Add clk provider DT binding documentation	2015-01-14 19:46:54 +00:00
spmi
thermal	thermal: exynos: Provide thermal_exynos.h file to be included in device tree files	2015-01-24 17:30:22 -04:00