Thomas Petazzoni 5cc0de1faf pinctrl: mvebu: armada-39x: align NAND pin naming ... All SoCs use "nand" to designate NAND pins, only Armada 39x is using "nd", which is not consistent. This commit fixes that by renaming the corresponding functions. It also changes the subnames from rbn0/rbn1 to rb0/rb1, to respect the convention used everywhere that we don't encode the 'n' part of signal names. While this commit changes the main name of function, therefore potentially breaking the DT compatibility, this is not a problem since Armada 39x is a brand new SoC which isn't used in production yet. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		2015-06-10 11:11:39 +02:00
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bindings	pinctrl: mvebu: armada-39x: align NAND pin naming	2015-06-10 11:11:39 +02:00
00-INDEX
booting-without-of.txt	MIPS: BMIPS: Document the firmware->kernel DTB interface	2015-04-01 17:21:38 +02:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt	Documentation: rename of_selftest.txt to of_unittest.txt	2015-03-25 00:50:53 -05:00
overlay-notes.txt	Documentation: devicetree: Fix double words in Doumentation/devicetree	2015-01-28 15:13:11 -07:00
todo.txt
usage-model.txt