linux_dsm_epyc7002/drivers/net/ethernet/atheros/atl1c
Huang, Xiong 5cbdcc2f49 atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patch
bit MASTER_CTRL_CLK_SEL_DIS could be set before enter suspend
clear it after resume to enable pclk(PCIE clock) switch to
low frequency(25M) in some circumstances to save power.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19 20:14:20 -04:00
..
atl1c_ethtool.c atl1c: remove VPD register 2012-04-18 15:35:30 -04:00
atl1c_hw.c atheros eth: set addr_assign_type if random_ether_addr() used 2012-02-17 15:58:06 -05:00
atl1c_hw.h atl1c: refine reg definition of REG_MASTER_CTRL 2012-04-19 20:14:20 -04:00
atl1c_main.c atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patch 2012-04-19 20:14:20 -04:00
atl1c.h atl1c: remove dmar_dly_cnt and dmaw_dly_cnt 2012-04-19 20:14:19 -04:00
Makefile