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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8250a9b43b
Original Loongson-3 pci_ops can only access standard pci config space, this patch let it be able to access extended pci config space. Signed-off-by: Huacai Chen <chenhc@lemote.com> [paul.burton@mips.com: Tweaks to fix checkpatch warnings, reverse xmas tree] Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20707/ Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Huacai Chen <chenhuacai@gmail.com>
117 lines
2.7 KiB
C
117 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <asm/mips-boards/bonito64.h>
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#include <loongson.h>
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#define PCI_ACCESS_READ 0
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#define PCI_ACCESS_WRITE 1
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#define HT1LO_PCICFG_BASE 0x1a000000
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#define HT1LO_PCICFG_BASE_TP1 0x1b000000
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static int loongson3_pci_config_access(unsigned char access_type,
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struct pci_bus *bus, unsigned int devfn,
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int where, u32 *data)
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{
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unsigned char busnum = bus->number;
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int function = PCI_FUNC(devfn);
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int device = PCI_SLOT(devfn);
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int reg = where & ~3;
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void *addrp;
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u64 addr;
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if (where < PCI_CFG_SPACE_SIZE) { /* standard config */
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addr = (busnum << 16) | (device << 11) | (function << 8) | reg;
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if (busnum == 0) {
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if (device > 31)
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return PCIBIOS_DEVICE_NOT_FOUND;
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addrp = (void *)TO_UNCAC(HT1LO_PCICFG_BASE | addr);
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} else {
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addrp = (void *)TO_UNCAC(HT1LO_PCICFG_BASE_TP1 | addr);
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}
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} else if (where < PCI_CFG_SPACE_EXP_SIZE) { /* extended config */
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struct pci_dev *rootdev;
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rootdev = pci_get_domain_bus_and_slot(0, 0, 0);
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if (!rootdev)
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return PCIBIOS_DEVICE_NOT_FOUND;
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addr = pci_resource_start(rootdev, 3);
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if (!addr)
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return PCIBIOS_DEVICE_NOT_FOUND;
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addr |= busnum << 20 | device << 15 | function << 12 | reg;
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addrp = (void *)TO_UNCAC(addr);
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} else {
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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if (access_type == PCI_ACCESS_WRITE)
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writel(*data, addrp);
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else {
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*data = readl(addrp);
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if (*data == 0xffffffff) {
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*data = -1;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int loongson3_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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u32 data = 0;
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int ret = loongson3_pci_config_access(PCI_ACCESS_READ,
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bus, devfn, where, &data);
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if (ret != PCIBIOS_SUCCESSFUL)
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return ret;
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if (size == 1)
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*val = (data >> ((where & 3) << 3)) & 0xff;
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else if (size == 2)
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*val = (data >> ((where & 3) << 3)) & 0xffff;
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else
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*val = data;
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return PCIBIOS_SUCCESSFUL;
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}
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static int loongson3_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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u32 data = 0;
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int ret;
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if (size == 4)
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data = val;
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else {
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ret = loongson3_pci_config_access(PCI_ACCESS_READ,
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bus, devfn, where, &data);
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if (ret != PCIBIOS_SUCCESSFUL)
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return ret;
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if (size == 1)
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data = (data & ~(0xff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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else if (size == 2)
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data = (data & ~(0xffff << ((where & 3) << 3))) |
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(val << ((where & 3) << 3));
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}
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ret = loongson3_pci_config_access(PCI_ACCESS_WRITE,
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bus, devfn, where, &data);
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return ret;
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}
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struct pci_ops loongson_pci_ops = {
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.read = loongson3_pci_pcibios_read,
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.write = loongson3_pci_pcibios_write
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};
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