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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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f7c42d9862
Upon failure to probe the DFLL, the OPP table will not be cleaned up properly. Fix this and while at it make sure the OPP table will also be cleared upon driver removal. Signed-off-by: Thierry Reding <treding@nvidia.com>
69 lines
1.5 KiB
C
69 lines
1.5 KiB
C
/*
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* Utility functions for parsing Tegra CVB voltage tables
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#ifndef __DRIVERS_CLK_TEGRA_CVB_H
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#define __DRIVERS_CLK_TEGRA_CVB_H
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#include <linux/types.h>
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struct device;
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#define MAX_DVFS_FREQS 40
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struct rail_alignment {
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int offset_uv;
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int step_uv;
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};
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struct cvb_coefficients {
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int c0;
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int c1;
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int c2;
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};
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struct cvb_table_freq_entry {
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unsigned long freq;
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struct cvb_coefficients coefficients;
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};
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struct cvb_cpu_dfll_data {
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u32 tune0_low;
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u32 tune0_high;
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u32 tune1;
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};
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struct cvb_table {
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int speedo_id;
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int process_id;
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int min_millivolts;
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int max_millivolts;
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struct rail_alignment alignment;
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int speedo_scale;
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int voltage_scale;
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struct cvb_table_freq_entry entries[MAX_DVFS_FREQS];
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struct cvb_cpu_dfll_data cpu_dfll_data;
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};
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const struct cvb_table *
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tegra_cvb_add_opp_table(struct device *dev, const struct cvb_table *cvb_tables,
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size_t count, int process_id, int speedo_id,
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int speedo_value, unsigned long max_freq);
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void tegra_cvb_remove_opp_table(struct device *dev,
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const struct cvb_table *table,
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unsigned long max_freq);
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#endif
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