mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 05:43:47 +07:00
aefcf2f4b5
Pull kernel lockdown mode from James Morris:
"This is the latest iteration of the kernel lockdown patchset, from
Matthew Garrett, David Howells and others.
From the original description:
This patchset introduces an optional kernel lockdown feature,
intended to strengthen the boundary between UID 0 and the kernel.
When enabled, various pieces of kernel functionality are restricted.
Applications that rely on low-level access to either hardware or the
kernel may cease working as a result - therefore this should not be
enabled without appropriate evaluation beforehand.
The majority of mainstream distributions have been carrying variants
of this patchset for many years now, so there's value in providing a
doesn't meet every distribution requirement, but gets us much closer
to not requiring external patches.
There are two major changes since this was last proposed for mainline:
- Separating lockdown from EFI secure boot. Background discussion is
covered here: https://lwn.net/Articles/751061/
- Implementation as an LSM, with a default stackable lockdown LSM
module. This allows the lockdown feature to be policy-driven,
rather than encoding an implicit policy within the mechanism.
The new locked_down LSM hook is provided to allow LSMs to make a
policy decision around whether kernel functionality that would allow
tampering with or examining the runtime state of the kernel should be
permitted.
The included lockdown LSM provides an implementation with a simple
policy intended for general purpose use. This policy provides a coarse
level of granularity, controllable via the kernel command line:
lockdown={integrity|confidentiality}
Enable the kernel lockdown feature. If set to integrity, kernel features
that allow userland to modify the running kernel are disabled. If set to
confidentiality, kernel features that allow userland to extract
confidential information from the kernel are also disabled.
This may also be controlled via /sys/kernel/security/lockdown and
overriden by kernel configuration.
New or existing LSMs may implement finer-grained controls of the
lockdown features. Refer to the lockdown_reason documentation in
include/linux/security.h for details.
The lockdown feature has had signficant design feedback and review
across many subsystems. This code has been in linux-next for some
weeks, with a few fixes applied along the way.
Stephen Rothwell noted that commit 9d1f8be5cf
("bpf: Restrict bpf
when kernel lockdown is in confidentiality mode") is missing a
Signed-off-by from its author. Matthew responded that he is providing
this under category (c) of the DCO"
* 'next-lockdown' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security: (31 commits)
kexec: Fix file verification on S390
security: constify some arrays in lockdown LSM
lockdown: Print current->comm in restriction messages
efi: Restrict efivar_ssdt_load when the kernel is locked down
tracefs: Restrict tracefs when the kernel is locked down
debugfs: Restrict debugfs when the kernel is locked down
kexec: Allow kexec_file() with appropriate IMA policy when locked down
lockdown: Lock down perf when in confidentiality mode
bpf: Restrict bpf when kernel lockdown is in confidentiality mode
lockdown: Lock down tracing and perf kprobes when in confidentiality mode
lockdown: Lock down /proc/kcore
x86/mmiotrace: Lock down the testmmiotrace module
lockdown: Lock down module params that specify hardware parameters (eg. ioport)
lockdown: Lock down TIOCSSERIAL
lockdown: Prohibit PCMCIA CIS storage when the kernel is locked down
acpi: Disable ACPI table override if the kernel is locked down
acpi: Ignore acpi_rsdp kernel param when the kernel has been locked down
ACPI: Limit access to custom_method when the kernel is locked down
x86/msr: Restrict MSR access when the kernel is locked down
x86: Lock down IO port access when the kernel is locked down
...
462 lines
9.5 KiB
C
462 lines
9.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Procfs interface for the PCI bus
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*
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* Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/capability.h>
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#include <linux/uaccess.h>
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#include <linux/security.h>
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#include <asm/byteorder.h>
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#include "pci.h"
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static int proc_initialized; /* = 0 */
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static loff_t proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
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{
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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return fixed_size_llseek(file, off, whence, dev->cfg_size);
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}
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static ssize_t proc_bus_pci_read(struct file *file, char __user *buf,
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size_t nbytes, loff_t *ppos)
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{
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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unsigned int pos = *ppos;
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unsigned int cnt, size;
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/*
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* Normal users can read only the standardized portion of the
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* configuration space as several chips lock up when trying to read
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* undefined locations (think of Intel PIIX4 as a typical example).
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*/
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if (capable(CAP_SYS_ADMIN))
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size = dev->cfg_size;
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else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
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size = 128;
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else
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size = 64;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(buf, cnt))
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return -EINVAL;
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pci_config_pm_runtime_get(dev);
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if ((pos & 1) && cnt) {
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unsigned char val;
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pci_user_read_config_byte(dev, pos, &val);
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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unsigned short val;
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pci_user_read_config_word(dev, pos, &val);
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
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unsigned int val;
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pci_user_read_config_dword(dev, pos, &val);
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__put_user(cpu_to_le32(val), (__le32 __user *) buf);
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
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unsigned short val;
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pci_user_read_config_word(dev, pos, &val);
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__put_user(cpu_to_le16(val), (__le16 __user *) buf);
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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pci_user_read_config_byte(dev, pos, &val);
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__put_user(val, buf);
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buf++;
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pos++;
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cnt--;
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}
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pci_config_pm_runtime_put(dev);
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*ppos = pos;
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return nbytes;
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}
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static ssize_t proc_bus_pci_write(struct file *file, const char __user *buf,
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size_t nbytes, loff_t *ppos)
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{
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struct inode *ino = file_inode(file);
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struct pci_dev *dev = PDE_DATA(ino);
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int pos = *ppos;
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int size = dev->cfg_size;
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int cnt, ret;
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ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
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if (ret)
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return ret;
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if (pos >= size)
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return 0;
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if (nbytes >= size)
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nbytes = size;
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if (pos + nbytes > size)
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nbytes = size - pos;
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cnt = nbytes;
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if (!access_ok(buf, cnt))
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return -EINVAL;
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pci_config_pm_runtime_get(dev);
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if ((pos & 1) && cnt) {
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unsigned char val;
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__get_user(val, buf);
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pci_user_write_config_byte(dev, pos, val);
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buf++;
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pos++;
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cnt--;
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}
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if ((pos & 3) && cnt > 2) {
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__le16 val;
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__get_user(val, (__le16 __user *) buf);
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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while (cnt >= 4) {
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__le32 val;
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__get_user(val, (__le32 __user *) buf);
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pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
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buf += 4;
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pos += 4;
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cnt -= 4;
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}
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if (cnt >= 2) {
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__le16 val;
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__get_user(val, (__le16 __user *) buf);
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pci_user_write_config_word(dev, pos, le16_to_cpu(val));
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buf += 2;
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pos += 2;
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cnt -= 2;
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}
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if (cnt) {
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unsigned char val;
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__get_user(val, buf);
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pci_user_write_config_byte(dev, pos, val);
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buf++;
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pos++;
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cnt--;
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}
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pci_config_pm_runtime_put(dev);
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*ppos = pos;
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i_size_write(ino, dev->cfg_size);
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return nbytes;
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}
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struct pci_filp_private {
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enum pci_mmap_state mmap_state;
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int write_combine;
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};
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static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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#ifdef HAVE_PCI_MMAP
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struct pci_filp_private *fpriv = file->private_data;
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#endif /* HAVE_PCI_MMAP */
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int ret = 0;
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ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
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if (ret)
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return ret;
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switch (cmd) {
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case PCIIOC_CONTROLLER:
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ret = pci_domain_nr(dev->bus);
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break;
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#ifdef HAVE_PCI_MMAP
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case PCIIOC_MMAP_IS_IO:
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if (!arch_can_pci_mmap_io())
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return -EINVAL;
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fpriv->mmap_state = pci_mmap_io;
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break;
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case PCIIOC_MMAP_IS_MEM:
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fpriv->mmap_state = pci_mmap_mem;
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break;
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case PCIIOC_WRITE_COMBINE:
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if (arch_can_pci_mmap_wc()) {
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if (arg)
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fpriv->write_combine = 1;
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else
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fpriv->write_combine = 0;
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break;
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}
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/* If arch decided it can't, fall through... */
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#endif /* HAVE_PCI_MMAP */
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/* fall through */
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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#ifdef HAVE_PCI_MMAP
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static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
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{
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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struct pci_filp_private *fpriv = file->private_data;
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int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
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if (!capable(CAP_SYS_RAWIO) ||
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security_locked_down(LOCKDOWN_PCI_ACCESS))
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return -EPERM;
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if (fpriv->mmap_state == pci_mmap_io) {
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if (!arch_can_pci_mmap_io())
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return -EINVAL;
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res_bit = IORESOURCE_IO;
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}
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/* Make sure the caller is mapping a real resource for this device */
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for (i = 0; i < PCI_ROM_RESOURCE; i++) {
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if (dev->resource[i].flags & res_bit &&
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pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS))
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break;
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}
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if (i >= PCI_ROM_RESOURCE)
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return -ENODEV;
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if (fpriv->mmap_state == pci_mmap_mem &&
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fpriv->write_combine) {
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if (dev->resource[i].flags & IORESOURCE_PREFETCH)
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write_combine = 1;
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else
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return -EINVAL;
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}
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ret = pci_mmap_page_range(dev, i, vma,
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fpriv->mmap_state, write_combine);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int proc_bus_pci_open(struct inode *inode, struct file *file)
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{
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struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
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if (!fpriv)
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return -ENOMEM;
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fpriv->mmap_state = pci_mmap_io;
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fpriv->write_combine = 0;
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file->private_data = fpriv;
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return 0;
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}
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static int proc_bus_pci_release(struct inode *inode, struct file *file)
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{
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kfree(file->private_data);
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file->private_data = NULL;
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return 0;
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}
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#endif /* HAVE_PCI_MMAP */
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static const struct file_operations proc_bus_pci_operations = {
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.owner = THIS_MODULE,
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.llseek = proc_bus_pci_lseek,
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.read = proc_bus_pci_read,
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.write = proc_bus_pci_write,
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.unlocked_ioctl = proc_bus_pci_ioctl,
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.compat_ioctl = proc_bus_pci_ioctl,
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#ifdef HAVE_PCI_MMAP
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.open = proc_bus_pci_open,
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.release = proc_bus_pci_release,
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.mmap = proc_bus_pci_mmap,
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#ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
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.get_unmapped_area = get_pci_unmapped_area,
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#endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
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#endif /* HAVE_PCI_MMAP */
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};
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/* iterator */
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static void *pci_seq_start(struct seq_file *m, loff_t *pos)
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{
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struct pci_dev *dev = NULL;
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loff_t n = *pos;
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for_each_pci_dev(dev) {
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if (!n--)
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break;
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}
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return dev;
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}
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static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
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{
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struct pci_dev *dev = v;
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(*pos)++;
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dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
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return dev;
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}
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static void pci_seq_stop(struct seq_file *m, void *v)
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{
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if (v) {
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struct pci_dev *dev = v;
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pci_dev_put(dev);
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}
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}
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static int show_device(struct seq_file *m, void *v)
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{
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const struct pci_dev *dev = v;
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const struct pci_driver *drv;
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int i;
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if (dev == NULL)
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return 0;
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drv = pci_dev_driver(dev);
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seq_printf(m, "%02x%02x\t%04x%04x\t%x",
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dev->bus->number,
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dev->devfn,
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dev->vendor,
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dev->device,
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dev->irq);
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/* only print standard and ROM resources to preserve compatibility */
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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resource_size_t start, end;
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pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
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seq_printf(m, "\t%16llx",
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(unsigned long long)(start |
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(dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
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}
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for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
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resource_size_t start, end;
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pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
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seq_printf(m, "\t%16llx",
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dev->resource[i].start < dev->resource[i].end ?
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(unsigned long long)(end - start) + 1 : 0);
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}
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seq_putc(m, '\t');
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if (drv)
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seq_puts(m, drv->name);
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seq_putc(m, '\n');
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return 0;
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}
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static const struct seq_operations proc_bus_pci_devices_op = {
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.start = pci_seq_start,
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.next = pci_seq_next,
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.stop = pci_seq_stop,
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.show = show_device
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};
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static struct proc_dir_entry *proc_bus_pci_dir;
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int pci_proc_attach_device(struct pci_dev *dev)
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{
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struct pci_bus *bus = dev->bus;
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struct proc_dir_entry *e;
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char name[16];
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if (!proc_initialized)
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return -EACCES;
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if (!bus->procdir) {
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if (pci_proc_domain(bus)) {
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sprintf(name, "%04x:%02x", pci_domain_nr(bus),
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bus->number);
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} else {
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sprintf(name, "%02x", bus->number);
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}
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bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
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if (!bus->procdir)
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return -ENOMEM;
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}
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sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
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e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
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&proc_bus_pci_operations, dev);
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if (!e)
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return -ENOMEM;
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proc_set_size(e, dev->cfg_size);
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dev->procent = e;
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return 0;
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}
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int pci_proc_detach_device(struct pci_dev *dev)
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{
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proc_remove(dev->procent);
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dev->procent = NULL;
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return 0;
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}
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int pci_proc_detach_bus(struct pci_bus *bus)
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{
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proc_remove(bus->procdir);
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return 0;
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}
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static int __init pci_proc_init(void)
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{
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struct pci_dev *dev = NULL;
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proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
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proc_create_seq("devices", 0, proc_bus_pci_dir,
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&proc_bus_pci_devices_op);
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proc_initialized = 1;
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for_each_pci_dev(dev)
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pci_proc_attach_device(dev);
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return 0;
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}
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device_initcall(pci_proc_init);
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