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26dd3e4ff9
Historically a lot of these existed because we did not have a distinction between what was modular code and what was providing support to modules via EXPORT_SYMBOL and friends. That changed when we forked out support for the latter into the export.h file. This means we should be able to reduce the usage of module.h in code that is obj-y Makefile or bool Kconfig. In the case of some code where it is modular, we can extend that to also include files that are building basic support functionality but not related to loading or registering the final module; such files also have no need whatsoever for module.h The advantage in removing such instances is that module.h itself sources about 15 other headers; adding significantly to what we feed cpp, and it can obscure what headers we are effectively using. Since module.h might have been the implicit source for init.h (for __init) and for export.h (for EXPORT_SYMBOL) we consider each instance for the presence of either and replace/add as needed. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Build coverage of all the mips defconfigs revealed the module.h header was masking a couple of implicit include instances, so we add the appropriate headers there. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: David Daney <david.daney@cavium.com> Cc: John Crispin <john@phrozen.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "Steven J. Hill" <steven.hill@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15131/ [james.hogan@imgtec.com: Preserve sort order where it already exists] Signed-off-by: James Hogan <james.hogan@imgtec.com>
276 lines
8.4 KiB
C
276 lines
8.4 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Parts of this file are based on Ralink's 2.6.21 BSP
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*
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2013 John Crispin <john@phrozen.org>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <asm/io.h>
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#include <asm/mipsregs.h>
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#include <asm/mach-ralink/ralink_regs.h>
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#include <asm/mach-ralink/rt305x.h>
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#include <asm/mach-ralink/pinmux.h>
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#include "common.h"
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static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
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static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
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static struct rt2880_pmx_func uartf_func[] = {
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FUNC("uartf", RT305X_GPIO_MODE_UARTF, 7, 8),
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FUNC("pcm uartf", RT305X_GPIO_MODE_PCM_UARTF, 7, 8),
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FUNC("pcm i2s", RT305X_GPIO_MODE_PCM_I2S, 7, 8),
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FUNC("i2s uartf", RT305X_GPIO_MODE_I2S_UARTF, 7, 8),
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FUNC("pcm gpio", RT305X_GPIO_MODE_PCM_GPIO, 11, 4),
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FUNC("gpio uartf", RT305X_GPIO_MODE_GPIO_UARTF, 7, 4),
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FUNC("gpio i2s", RT305X_GPIO_MODE_GPIO_I2S, 7, 4),
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};
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static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 15, 2) };
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static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
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static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 2) };
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static struct rt2880_pmx_func rt5350_led_func[] = { FUNC("led", 0, 22, 5) };
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static struct rt2880_pmx_func rt5350_cs1_func[] = {
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FUNC("spi_cs1", 0, 27, 1),
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FUNC("wdg_cs1", 1, 27, 1),
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};
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static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 16) };
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static struct rt2880_pmx_func rt3352_rgmii_func[] = {
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FUNC("rgmii", 0, 24, 12)
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};
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static struct rt2880_pmx_func rgmii_func[] = { FUNC("rgmii", 0, 40, 12) };
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static struct rt2880_pmx_func rt3352_lna_func[] = { FUNC("lna", 0, 36, 2) };
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static struct rt2880_pmx_func rt3352_pa_func[] = { FUNC("pa", 0, 38, 2) };
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static struct rt2880_pmx_func rt3352_led_func[] = { FUNC("led", 0, 40, 5) };
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static struct rt2880_pmx_group rt3050_pinmux_data[] = {
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GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
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GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO),
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GRP("rgmii", rgmii_func, 1, RT305X_GPIO_MODE_RGMII),
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GRP("sdram", sdram_func, 1, RT305X_GPIO_MODE_SDRAM),
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{ 0 }
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};
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static struct rt2880_pmx_group rt3352_pinmux_data[] = {
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GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
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GRP("mdio", mdio_func, 1, RT305X_GPIO_MODE_MDIO),
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GRP("rgmii", rt3352_rgmii_func, 1, RT305X_GPIO_MODE_RGMII),
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GRP("lna", rt3352_lna_func, 1, RT3352_GPIO_MODE_LNA),
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GRP("pa", rt3352_pa_func, 1, RT3352_GPIO_MODE_PA),
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GRP("led", rt3352_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
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{ 0 }
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};
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static struct rt2880_pmx_group rt5350_pinmux_data[] = {
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GRP("i2c", i2c_func, 1, RT305X_GPIO_MODE_I2C),
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GRP("spi", spi_func, 1, RT305X_GPIO_MODE_SPI),
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GRP("uartf", uartf_func, RT305X_GPIO_MODE_UART0_MASK,
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RT305X_GPIO_MODE_UART0_SHIFT),
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GRP("uartlite", uartlite_func, 1, RT305X_GPIO_MODE_UART1),
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GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
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GRP("led", rt5350_led_func, 1, RT5350_GPIO_MODE_PHY_LED),
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GRP("spi_cs1", rt5350_cs1_func, 2, RT5350_GPIO_MODE_SPI_CS1),
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{ 0 }
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};
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static unsigned long rt5350_get_mem_size(void)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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unsigned long ret;
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u32 t;
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t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG);
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t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) &
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RT5350_SYSCFG0_DRAM_SIZE_MASK;
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switch (t) {
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case RT5350_SYSCFG0_DRAM_SIZE_2M:
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ret = 2;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_8M:
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ret = 8;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_16M:
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ret = 16;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_32M:
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ret = 32;
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break;
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case RT5350_SYSCFG0_DRAM_SIZE_64M:
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ret = 64;
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break;
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default:
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panic("rt5350: invalid DRAM size: %u", t);
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break;
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}
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return ret;
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}
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void __init ralink_clk_init(void)
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{
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unsigned long cpu_rate, sys_rate, wdt_rate, uart_rate;
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unsigned long wmac_rate = 40000000;
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u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG);
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if (soc_is_rt305x() || soc_is_rt3350()) {
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t = (t >> RT305X_SYSCFG_CPUCLK_SHIFT) &
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RT305X_SYSCFG_CPUCLK_MASK;
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switch (t) {
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case RT305X_SYSCFG_CPUCLK_LOW:
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cpu_rate = 320000000;
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break;
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case RT305X_SYSCFG_CPUCLK_HIGH:
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cpu_rate = 384000000;
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break;
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}
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sys_rate = uart_rate = wdt_rate = cpu_rate / 3;
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} else if (soc_is_rt3352()) {
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t = (t >> RT3352_SYSCFG0_CPUCLK_SHIFT) &
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RT3352_SYSCFG0_CPUCLK_MASK;
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switch (t) {
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case RT3352_SYSCFG0_CPUCLK_LOW:
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cpu_rate = 384000000;
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break;
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case RT3352_SYSCFG0_CPUCLK_HIGH:
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cpu_rate = 400000000;
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break;
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}
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sys_rate = wdt_rate = cpu_rate / 3;
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uart_rate = 40000000;
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} else if (soc_is_rt5350()) {
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t = (t >> RT5350_SYSCFG0_CPUCLK_SHIFT) &
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RT5350_SYSCFG0_CPUCLK_MASK;
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switch (t) {
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case RT5350_SYSCFG0_CPUCLK_360:
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cpu_rate = 360000000;
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sys_rate = cpu_rate / 3;
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break;
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case RT5350_SYSCFG0_CPUCLK_320:
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cpu_rate = 320000000;
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sys_rate = cpu_rate / 4;
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break;
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case RT5350_SYSCFG0_CPUCLK_300:
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cpu_rate = 300000000;
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sys_rate = cpu_rate / 3;
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break;
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default:
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BUG();
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}
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uart_rate = 40000000;
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wdt_rate = sys_rate;
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} else {
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BUG();
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}
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if (soc_is_rt3352() || soc_is_rt5350()) {
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u32 val = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG0);
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if (!(val & RT3352_CLKCFG0_XTAL_SEL))
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wmac_rate = 20000000;
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}
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ralink_clk_add("cpu", cpu_rate);
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ralink_clk_add("sys", sys_rate);
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ralink_clk_add("10000900.i2c", uart_rate);
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ralink_clk_add("10000a00.i2s", uart_rate);
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ralink_clk_add("10000b00.spi", sys_rate);
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ralink_clk_add("10000b40.spi", sys_rate);
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ralink_clk_add("10000100.timer", wdt_rate);
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ralink_clk_add("10000120.watchdog", wdt_rate);
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ralink_clk_add("10000500.uart", uart_rate);
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ralink_clk_add("10000c00.uartlite", uart_rate);
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ralink_clk_add("10100000.ethernet", sys_rate);
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ralink_clk_add("10180000.wmac", wmac_rate);
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}
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void __init ralink_of_remap(void)
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{
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rt_sysc_membase = plat_of_remap_node("ralink,rt3050-sysc");
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rt_memc_membase = plat_of_remap_node("ralink,rt3050-memc");
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if (!rt_sysc_membase || !rt_memc_membase)
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panic("Failed to remap core resources");
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}
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void prom_soc_init(struct ralink_soc_info *soc_info)
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{
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void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
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unsigned char *name;
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u32 n0;
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u32 n1;
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u32 id;
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n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
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n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
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if (n0 == RT3052_CHIP_NAME0 && n1 == RT3052_CHIP_NAME1) {
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unsigned long icache_sets;
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icache_sets = (read_c0_config1() >> 22) & 7;
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if (icache_sets == 1) {
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ralink_soc = RT305X_SOC_RT3050;
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name = "RT3050";
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soc_info->compatible = "ralink,rt3050-soc";
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} else {
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ralink_soc = RT305X_SOC_RT3052;
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name = "RT3052";
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soc_info->compatible = "ralink,rt3052-soc";
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}
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} else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) {
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ralink_soc = RT305X_SOC_RT3350;
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name = "RT3350";
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soc_info->compatible = "ralink,rt3350-soc";
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} else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) {
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ralink_soc = RT305X_SOC_RT3352;
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name = "RT3352";
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soc_info->compatible = "ralink,rt3352-soc";
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} else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) {
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ralink_soc = RT305X_SOC_RT5350;
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name = "RT5350";
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soc_info->compatible = "ralink,rt5350-soc";
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} else {
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panic("rt305x: unknown SoC, n0:%08x n1:%08x", n0, n1);
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}
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id = __raw_readl(sysc + SYSC_REG_CHIP_ID);
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snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
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"Ralink %s id:%u rev:%u",
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name,
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(id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
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(id & CHIP_ID_REV_MASK));
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soc_info->mem_base = RT305X_SDRAM_BASE;
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if (soc_is_rt5350()) {
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soc_info->mem_size = rt5350_get_mem_size();
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rt2880_pinmux_data = rt5350_pinmux_data;
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} else if (soc_is_rt305x() || soc_is_rt3350()) {
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soc_info->mem_size_min = RT305X_MEM_SIZE_MIN;
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soc_info->mem_size_max = RT305X_MEM_SIZE_MAX;
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rt2880_pinmux_data = rt3050_pinmux_data;
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} else if (soc_is_rt3352()) {
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soc_info->mem_size_min = RT3352_MEM_SIZE_MIN;
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soc_info->mem_size_max = RT3352_MEM_SIZE_MAX;
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rt2880_pinmux_data = rt3352_pinmux_data;
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}
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}
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