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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4016a7f15e
In commit 48398b6e70 ("enic: set UDP rss flag") driver needed to set a
single bit to enable UDP rss. This is changed to two bit. One for UDP
IPv4 and other bit for UDP IPv6. The hardware which supports this is not
released yet. When released, driver should set 2 bit to enable UDP rss for
both IPv4 and IPv6.
Also add spinlock around vnic_dev_capable_rss_hash_type().
Signed-off-by: Govindarajulu Varadarajan <gvaradar@cisco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
75 lines
2.9 KiB
C
75 lines
2.9 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef _VNIC_NIC_H_
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#define _VNIC_NIC_H_
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#define NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD 0xffUL
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#define NIC_CFG_RSS_DEFAULT_CPU_SHIFT 0
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#define NIC_CFG_RSS_HASH_TYPE (0xffUL << 8)
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#define NIC_CFG_RSS_HASH_TYPE_MASK_FIELD 0xffUL
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#define NIC_CFG_RSS_HASH_TYPE_SHIFT 8
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#define NIC_CFG_RSS_HASH_BITS (7UL << 16)
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#define NIC_CFG_RSS_HASH_BITS_MASK_FIELD 7UL
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#define NIC_CFG_RSS_HASH_BITS_SHIFT 16
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#define NIC_CFG_RSS_BASE_CPU (7UL << 19)
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#define NIC_CFG_RSS_BASE_CPU_MASK_FIELD 7UL
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#define NIC_CFG_RSS_BASE_CPU_SHIFT 19
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#define NIC_CFG_RSS_ENABLE (1UL << 22)
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#define NIC_CFG_RSS_ENABLE_MASK_FIELD 1UL
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#define NIC_CFG_RSS_ENABLE_SHIFT 22
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#define NIC_CFG_TSO_IPID_SPLIT_EN (1UL << 23)
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#define NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD 1UL
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#define NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT 23
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#define NIC_CFG_IG_VLAN_STRIP_EN (1UL << 24)
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#define NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD 1UL
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#define NIC_CFG_IG_VLAN_STRIP_EN_SHIFT 24
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#define NIC_CFG_RSS_HASH_TYPE_UDP_IPV4 (1 << 0)
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#define NIC_CFG_RSS_HASH_TYPE_IPV4 (1 << 1)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 (1 << 2)
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#define NIC_CFG_RSS_HASH_TYPE_IPV6 (1 << 3)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 (1 << 4)
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#define NIC_CFG_RSS_HASH_TYPE_IPV6_EX (1 << 5)
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#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX (1 << 6)
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#define NIC_CFG_RSS_HASH_TYPE_UDP_IPV6 (1 << 7)
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static inline void vnic_set_nic_cfg(u32 *nic_cfg,
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u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu,
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u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en)
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{
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*nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) |
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((rss_hash_type & NIC_CFG_RSS_HASH_TYPE_MASK_FIELD)
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<< NIC_CFG_RSS_HASH_TYPE_SHIFT) |
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((rss_hash_bits & NIC_CFG_RSS_HASH_BITS_MASK_FIELD)
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<< NIC_CFG_RSS_HASH_BITS_SHIFT) |
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((rss_base_cpu & NIC_CFG_RSS_BASE_CPU_MASK_FIELD)
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<< NIC_CFG_RSS_BASE_CPU_SHIFT) |
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((rss_enable & NIC_CFG_RSS_ENABLE_MASK_FIELD)
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<< NIC_CFG_RSS_ENABLE_SHIFT) |
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((tso_ipid_split_en & NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD)
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<< NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT) |
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((ig_vlan_strip_en & NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD)
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<< NIC_CFG_IG_VLAN_STRIP_EN_SHIFT);
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}
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#endif /* _VNIC_NIC_H_ */
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