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4d0951ee70
For v3 hw SAS, it supports configuring power state from D0 to D3 for entering Low Power status and power state from D3 to D0 for quit Low Power status. When power state from D0 to D3, HW will send FLR to clear the registers of ECAM and BAR space, and when power state from D3 to D0, it will clear the registers of ECAM space only. So when suspend, need to do like controller reset (including disable interrupts/DQ/PHY/BUS), and also release slots after FLR. When resume, re-config the registers of BAR space. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> |
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| .. | ||
| hisi_sas_main.c | ||
| hisi_sas_v1_hw.c | ||
| hisi_sas_v2_hw.c | ||
| hisi_sas_v3_hw.c | ||
| hisi_sas.h | ||
| Kconfig | ||
| Makefile | ||