mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
fe86d71416
commit b6c39bfcf1
("net/mlx4_en: Add a service task")
added a build error on 32bit arches.
ERROR: "__udivdi3" [drivers/net/ethernet/mellanox/mlx4/mlx4_en.ko]
undefined!
Fix this problem by using do_div()
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Eric Dumazet <edumazet@google.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Amir Vadai <amirv@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
152 lines
4.4 KiB
C
152 lines
4.4 KiB
C
/*
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* Copyright (c) 2012 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/mlx4/device.h>
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#include "mlx4_en.h"
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int mlx4_en_timestamp_config(struct net_device *dev, int tx_type, int rx_filter)
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{
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struct mlx4_en_priv *priv = netdev_priv(dev);
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struct mlx4_en_dev *mdev = priv->mdev;
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int port_up = 0;
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int err = 0;
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mutex_lock(&mdev->state_lock);
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if (priv->port_up) {
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port_up = 1;
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mlx4_en_stop_port(dev, 1);
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}
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mlx4_en_free_resources(priv);
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en_warn(priv, "Changing Time Stamp configuration\n");
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priv->hwtstamp_config.tx_type = tx_type;
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priv->hwtstamp_config.rx_filter = rx_filter;
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if (rx_filter != HWTSTAMP_FILTER_NONE)
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dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
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else
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dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
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err = mlx4_en_alloc_resources(priv);
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if (err) {
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en_err(priv, "Failed reallocating port resources\n");
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goto out;
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}
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if (port_up) {
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err = mlx4_en_start_port(dev);
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if (err)
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en_err(priv, "Failed starting port\n");
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}
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out:
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mutex_unlock(&mdev->state_lock);
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netdev_features_change(dev);
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return err;
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}
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/* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
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*/
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static cycle_t mlx4_en_read_clock(const struct cyclecounter *tc)
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{
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struct mlx4_en_dev *mdev =
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container_of(tc, struct mlx4_en_dev, cycles);
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struct mlx4_dev *dev = mdev->dev;
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return mlx4_read_clock(dev) & tc->mask;
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}
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u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
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{
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u64 hi, lo;
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struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
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lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
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hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
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return hi | lo;
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}
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void mlx4_en_fill_hwtstamps(struct mlx4_en_dev *mdev,
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struct skb_shared_hwtstamps *hwts,
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u64 timestamp)
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{
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u64 nsec;
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nsec = timecounter_cyc2time(&mdev->clock, timestamp);
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memset(hwts, 0, sizeof(struct skb_shared_hwtstamps));
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hwts->hwtstamp = ns_to_ktime(nsec);
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}
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void mlx4_en_init_timestamp(struct mlx4_en_dev *mdev)
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{
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struct mlx4_dev *dev = mdev->dev;
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u64 ns;
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memset(&mdev->cycles, 0, sizeof(mdev->cycles));
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mdev->cycles.read = mlx4_en_read_clock;
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mdev->cycles.mask = CLOCKSOURCE_MASK(48);
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/* Using shift to make calculation more accurate. Since current HW
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* clock frequency is 427 MHz, and cycles are given using a 48 bits
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* register, the biggest shift when calculating using u64, is 14
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* (max_cycles * multiplier < 2^64)
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*/
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mdev->cycles.shift = 14;
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mdev->cycles.mult =
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clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift);
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timecounter_init(&mdev->clock, &mdev->cycles,
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ktime_to_ns(ktime_get_real()));
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/* Calculate period in seconds to call the overflow watchdog - to make
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* sure counter is checked at least once every wrap around.
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*/
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ns = cyclecounter_cyc2ns(&mdev->cycles, mdev->cycles.mask);
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do_div(ns, NSEC_PER_SEC / 2 / HZ);
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mdev->overflow_period = ns;
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}
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void mlx4_en_ptp_overflow_check(struct mlx4_en_dev *mdev)
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{
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bool timeout = time_is_before_jiffies(mdev->last_overflow_check +
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mdev->overflow_period);
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if (timeout) {
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timecounter_read(&mdev->clock);
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mdev->last_overflow_check = jiffies;
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}
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}
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