mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-29 21:16:40 +07:00
eb3d3ec567
Pull ARM updates from Russell King: - Major clean-up of the L2 cache support code. The existing mess was becoming rather unmaintainable through all the additions that others have done over time. This turns it into a much nicer structure, and implements a few performance improvements as well. - Clean up some of the CP15 control register tweaks for alignment support, moving some code and data into alignment.c - DMA properties for ARM, from Santosh and reviewed by DT people. This adds DT properties to specify bus translations we can't discover automatically, and to indicate whether devices are coherent. - Hibernation support for ARM - Make ftrace work with read-only text in modules - add suspend support for PJ4B CPUs - rework interrupt masking for undefined instruction handling, which allows us to enable interrupts earlier in the handling of these exceptions. - support for big endian page tables - fix stacktrace support to exclude stacktrace functions from the trace, and add save_stack_trace_regs() implementation so that kprobes can record stack traces. - Add support for the Cortex-A17 CPU. - Remove last vestiges of ARM710 support. - Removal of ARM "meminfo" structure, finally converting us solely to memblock to handle the early memory initialisation. * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits) ARM: ensure C page table setup code follows assembly code (part II) ARM: ensure C page table setup code follows assembly code ARM: consolidate last remaining open-coded alignment trap enable ARM: remove global cr_no_alignment ARM: remove CPU_CP15 conditional from alignment.c ARM: remove unused adjust_cr() function ARM: move "noalign" command line option to alignment.c ARM: provide common method to clear bits in CPU control register ARM: 8025/1: Get rid of meminfo ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type ARM: 8066/1: correction for ARM patch 8031/2 ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation ARM: 8065/1: remove last use of CONFIG_CPU_ARM710 ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction ARM: 8047/1: rwsem: use asm-generic rwsem implementation ARM: l2c: trial at enabling some Cortex-A9 optimisations ARM: l2c: add warnings for stuff modifying aux_ctrl register values ARM: l2c: print a warning with L2C-310 caches if the cache size is modified ARM: l2c: remove old .set_debug method ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this ...
192 lines
4.8 KiB
C
192 lines
4.8 KiB
C
/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/gpio.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/smsc911x.h>
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#include <linux/usb/msm_hsusb.h>
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#include <linux/clkdev.h>
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#include <linux/memblock.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/memory.h>
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#include <asm/setup.h>
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#include <mach/clk.h>
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#include <mach/msm_iomap.h>
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#include <mach/dma.h>
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#include <mach/vreg.h>
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#include "devices.h"
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#include "gpiomux.h"
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#include "proc_comm.h"
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#include "common.h"
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static void __init msm7x30_fixup(struct tag *tag, char **cmdline)
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{
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for (; tag->hdr.size; tag = tag_next(tag))
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if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
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tag->u.mem.start = 0;
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tag->u.mem.size += SZ_2M;
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}
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}
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static void __init msm7x30_reserve(void)
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{
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memblock_remove(0x0, SZ_2M);
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}
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static int hsusb_phy_init_seq[] = {
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0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */
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0x02, 0x36, /* Disable CDR Auto Reset feature */
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-1
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};
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static int hsusb_link_clk_reset(struct clk *link_clk, bool assert)
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{
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int ret;
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if (assert) {
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ret = clk_reset(link_clk, CLK_RESET_ASSERT);
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if (ret)
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pr_err("usb hs_clk assert failed\n");
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} else {
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ret = clk_reset(link_clk, CLK_RESET_DEASSERT);
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if (ret)
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pr_err("usb hs_clk deassert failed\n");
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}
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return ret;
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}
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static int hsusb_phy_clk_reset(struct clk *phy_clk)
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{
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int ret;
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ret = clk_reset(phy_clk, CLK_RESET_ASSERT);
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if (ret) {
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pr_err("usb phy clk assert failed\n");
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return ret;
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}
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usleep_range(10000, 12000);
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ret = clk_reset(phy_clk, CLK_RESET_DEASSERT);
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if (ret)
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pr_err("usb phy clk deassert failed\n");
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return ret;
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}
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static struct msm_otg_platform_data msm_otg_pdata = {
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.phy_init_seq = hsusb_phy_init_seq,
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.mode = USB_DR_MODE_PERIPHERAL,
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.otg_control = OTG_PHY_CONTROL,
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.link_clk_reset = hsusb_link_clk_reset,
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.phy_clk_reset = hsusb_phy_clk_reset,
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};
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struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = {
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#ifdef CONFIG_SERIAL_MSM_CONSOLE
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[49] = { /* UART2 RFR */
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.suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN |
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GPIOMUX_FUNC_2 | GPIOMUX_VALID,
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},
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[50] = { /* UART2 CTS */
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.suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN |
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GPIOMUX_FUNC_2 | GPIOMUX_VALID,
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},
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[51] = { /* UART2 RX */
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.suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN |
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GPIOMUX_FUNC_2 | GPIOMUX_VALID,
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},
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[52] = { /* UART2 TX */
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.suspended = GPIOMUX_DRV_2MA | GPIOMUX_PULL_DOWN |
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GPIOMUX_FUNC_2 | GPIOMUX_VALID,
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},
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#endif
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};
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static struct platform_device *devices[] __initdata = {
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&msm_clock_7x30,
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&msm_device_gpio_7x30,
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#if defined(CONFIG_SERIAL_MSM) || defined(CONFIG_MSM_SERIAL_DEBUGGER)
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&msm_device_uart2,
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#endif
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&msm_device_smd,
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&msm_device_otg,
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&msm_device_hsusb,
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&msm_device_hsusb_host,
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};
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static void __init msm7x30_init_irq(void)
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{
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msm_init_irq();
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}
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static void __init msm7x30_init(void)
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{
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msm_device_otg.dev.platform_data = &msm_otg_pdata;
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msm_device_hsusb.dev.parent = &msm_device_otg.dev;
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msm_device_hsusb_host.dev.parent = &msm_device_otg.dev;
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platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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static void __init msm7x30_map_io(void)
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{
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msm_map_msm7x30_io();
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}
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static void __init msm7x30_init_late(void)
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{
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smd_debugfs_init();
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}
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MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
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.atag_offset = 0x100,
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.fixup = msm7x30_fixup,
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.reserve = msm7x30_reserve,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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.init_machine = msm7x30_init,
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.init_late = msm7x30_init_late,
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.init_time = msm7x30_timer_init,
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MACHINE_END
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MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
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.atag_offset = 0x100,
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.fixup = msm7x30_fixup,
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.reserve = msm7x30_reserve,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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.init_machine = msm7x30_init,
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.init_late = msm7x30_init_late,
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.init_time = msm7x30_timer_init,
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MACHINE_END
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MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
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.atag_offset = 0x100,
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.fixup = msm7x30_fixup,
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.reserve = msm7x30_reserve,
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.map_io = msm7x30_map_io,
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.init_irq = msm7x30_init_irq,
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.init_machine = msm7x30_init,
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.init_late = msm7x30_init_late,
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.init_time = msm7x30_timer_init,
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MACHINE_END
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