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ea3bfeec6b
I2C device reg should be "reg = <0x52 0x0 0x10>;"
Fixes: e29d0d9c90 ("dt-bindings: i3c: Document Cadence I3C master bindings")
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
44 lines
1.2 KiB
Plaintext
44 lines
1.2 KiB
Plaintext
Bindings for cadence I3C master block
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=====================================
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Required properties:
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--------------------
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- compatible: shall be "cdns,i3c-master"
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- clocks: shall reference the pclk and sysclk
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- clock-names: shall contain "pclk" and "sysclk"
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- interrupts: the interrupt line connected to this I3C master
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- reg: I3C master registers
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Mandatory properties defined by the generic binding (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details):
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- #address-cells: shall be set to 1
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- #size-cells: shall be set to 0
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Optional properties defined by the generic binding (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details):
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- i2c-scl-hz
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- i3c-scl-hz
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I3C device connected on the bus follow the generic description (see
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Documentation/devicetree/bindings/i3c/i3c.txt for more details).
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Example:
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i3c-master@0d040000 {
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compatible = "cdns,i3c-master";
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clocks = <&coreclock>, <&i3csysclock>;
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clock-names = "pclk", "sysclk";
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interrupts = <3 0>;
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reg = <0x0d040000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-scl-hz = <100000>;
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nunchuk: nunchuk@52 {
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compatible = "nintendo,nunchuk";
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reg = <0x52 0x0 0x10>;
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};
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};
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