mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 16:29:33 +07:00
8efcf34a26
This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface. -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAlsfCVIPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3KOcP/3O2+igstXt5rhemITdyi8rHkrIHPgetf25e ISBQzYrQOHV21SqT4le/Gk2CCQ6iX5Nv2DYoIrCzFWi/4DoDxXvryczQLla02Nru i8fcuxae7aFGW7/97G1+cATGPwuBLPiKXs6Wj01sKHeLBja5Det7eoXuHag7Y/Lo 4ls9wNZybMdlCcGm6+ULdj+XUdRyYUhOQQYvnPm2Q8hEkM+AiwLOBJTFwef9P5ad mX37kPDfwCxYwQXgZB1RkK/oJu0G2mTZXmGH5o+s+9yAyAupCQhmHGOrt3mlOf7j tLRlSgarJlO/QGIpJmDuCcxt3msD3OMd2dPbdgwojdpvycOU8EVWYLmCRpyIWQXv DCv9A9Gp4KlJnwxheVegBtilRA1aKsGuarWq6yeyOFt8N23Bgg/IjYKI9JF5+hPD M4q1oVAbUlfWb79rEc+TB0d7euREBkNn4TzzKMSOyP3eGUrXR0WUlq2A2VLxgIJo cx/ufY7CwvRgV+VxfhRbca+FmwDnu7uqzwLe73Ys2hnsuv8hXEtc+vSybqKqxVeU nHpWAqwaWhijlJiGq722vPo8avrLwjsxRwimogvijtesz9ZlTqrGtjkg61+eN2h8 eeuyRAsMUfVRiKuL3W+q4s0rzIauormnKsvRScKVyNFuiJfrfYb1odLoDGaOV/9G dQ7hA7TW =RUL0 -----END PGP SIGNATURE----- Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late updates from Olof Johansson: "This is a branch with a few merge requests that either came in late, or took a while longer for us to review and merge than usual and thus cut it a bit close to the merge window. We stage them in a separate branch and if things look good, we still send them up -- and that's the case here. This is mostly DT additions for Renesas platforms, adding IP block descriptions for existing and new SoCs. There are also some driver updates for Qualcomm platforms for SMEM/QMI and GENI, which is their generalized serial protocol interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits) soc: qcom: smem: introduce qcom_smem_virt_to_phys() soc: qcom: qmi: fix a buffer sizing bug MAINTAINERS: Update pattern for qcom_scm soc: Unconditionally include qcom Makefile soc: qcom: smem: check sooner in qcom_smem_set_global_partition() soc: qcom: smem: fix qcom_smem_set_global_partition() soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private() soc: qcom: smem: byte swap values properly soc: qcom: smem: return proper type for cached entry functions soc: qcom: smem: fix first cache entry calculation soc: qcom: cmd-db: Make endian-agnostic drivers: qcom: add command DB driver arm64: dts: renesas: salvator-common: Add ADV7482 support ARM: dts: r8a7740: Add CEU1 ARM: dts: r8a7740: Add CEU0 arm64: dts: renesas: salvator-common: enable VIN arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes arm64: dts: renesas: r8a7795-es1: add CSI-2 node ...
489 lines
8.1 KiB
Plaintext
489 lines
8.1 KiB
Plaintext
/*
|
|
* Device Tree Source for the Porter board
|
|
*
|
|
* Copyright (C) 2015 Cogent Embedded, Inc.
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public License
|
|
* version 2. This program is licensed "as is" without any warranty of any
|
|
* kind, whether express or implied.
|
|
*/
|
|
|
|
/*
|
|
* SSI-AK4642
|
|
*
|
|
* JP3: 2-1: AK4642
|
|
* 2-3: ADV7511
|
|
*
|
|
* This command is required before playback/capture:
|
|
*
|
|
* amixer set "LINEOUT Mixer DACL" on
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "r8a7791.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Porter";
|
|
compatible = "renesas,porter", "renesas,r8a7791";
|
|
|
|
aliases {
|
|
serial0 = &scif0;
|
|
i2c9 = &gpioi2c2;
|
|
i2c10 = &i2chdmi;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@40000000 {
|
|
device_type = "memory";
|
|
reg = <0 0x40000000 0 0x40000000>;
|
|
};
|
|
|
|
memory@200000000 {
|
|
device_type = "memory";
|
|
reg = <2 0x00000000 0 0x40000000>;
|
|
};
|
|
|
|
vcc_sdhi0: regulator-vcc-sdhi0 {
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "SDHI0 Vcc";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vccq_sdhi0: regulator-vccq-sdhi0 {
|
|
compatible = "regulator-gpio";
|
|
|
|
regulator-name = "SDHI0 VccQ";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
|
|
gpios-states = <1>;
|
|
states = <3300000 1
|
|
1800000 0>;
|
|
};
|
|
|
|
vcc_sdhi2: regulator-vcc-sdhi2 {
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "SDHI2 Vcc";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vccq_sdhi2: regulator-vccq-sdhi2 {
|
|
compatible = "regulator-gpio";
|
|
|
|
regulator-name = "SDHI2 VccQ";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
|
|
gpios-states = <1>;
|
|
states = <3300000 1
|
|
1800000 0>;
|
|
};
|
|
|
|
hdmi-out {
|
|
compatible = "hdmi-connector";
|
|
type = "a";
|
|
|
|
port {
|
|
hdmi_con: endpoint {
|
|
remote-endpoint = <&adv7511_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
x3_clk: x3-clock {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <148500000>;
|
|
};
|
|
|
|
x16_clk: x16-clock {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <74250000>;
|
|
};
|
|
|
|
x14_clk: audio_clock {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <11289600>;
|
|
};
|
|
|
|
sound {
|
|
compatible = "simple-audio-card";
|
|
|
|
simple-audio-card,format = "left_j";
|
|
simple-audio-card,bitclock-master = <&soundcodec>;
|
|
simple-audio-card,frame-master = <&soundcodec>;
|
|
|
|
simple-audio-card,cpu {
|
|
sound-dai = <&rcar_sound>;
|
|
};
|
|
|
|
soundcodec: simple-audio-card,codec {
|
|
sound-dai = <&ak4642>;
|
|
clocks = <&x14_clk>;
|
|
};
|
|
};
|
|
|
|
gpioi2c2: i2c-9 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "i2c-gpio";
|
|
status = "disabled";
|
|
scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
|
i2c-gpio,delay-us = <5>;
|
|
};
|
|
|
|
/*
|
|
* A fallback to GPIO is provided for I2C2.
|
|
*/
|
|
i2chdmi: i2c-10 {
|
|
compatible = "i2c-demux-pinctrl";
|
|
i2c-parent = <&i2c2>, <&gpioi2c2>;
|
|
i2c-bus-name = "i2c-hdmi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
ak4642: codec@12 {
|
|
compatible = "asahi-kasei,ak4642";
|
|
#sound-dai-cells = <0>;
|
|
reg = <0x12>;
|
|
};
|
|
|
|
composite-in@20 {
|
|
compatible = "adi,adv7180";
|
|
reg = <0x20>;
|
|
remote = <&vin0>;
|
|
|
|
port {
|
|
adv7180: endpoint {
|
|
bus-width = <8>;
|
|
remote-endpoint = <&vin0ep>;
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi@39 {
|
|
compatible = "adi,adv7511w";
|
|
reg = <0x39>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
adi,input-depth = <8>;
|
|
adi,input-colorspace = "rgb";
|
|
adi,input-clock = "1x";
|
|
adi,input-style = <1>;
|
|
adi,input-justification = "evenly";
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
adv7511_in: endpoint {
|
|
remote-endpoint = <&du_out_rgb>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
adv7511_out: endpoint {
|
|
remote-endpoint = <&hdmi_con>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&extal_clk {
|
|
clock-frequency = <20000000>;
|
|
};
|
|
|
|
&pfc {
|
|
scif0_pins: scif0 {
|
|
groups = "scif0_data_d";
|
|
function = "scif0";
|
|
};
|
|
|
|
ether_pins: ether {
|
|
groups = "eth_link", "eth_mdio", "eth_rmii";
|
|
function = "eth";
|
|
};
|
|
|
|
phy1_pins: phy1 {
|
|
groups = "intc_irq0";
|
|
function = "intc";
|
|
};
|
|
|
|
sdhi0_pins: sd0 {
|
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
|
function = "sdhi0";
|
|
};
|
|
|
|
sdhi2_pins: sd2 {
|
|
groups = "sdhi2_data4", "sdhi2_ctrl";
|
|
function = "sdhi2";
|
|
};
|
|
|
|
qspi_pins: qspi {
|
|
groups = "qspi_ctrl", "qspi_data4";
|
|
function = "qspi";
|
|
};
|
|
|
|
i2c2_pins: i2c2 {
|
|
groups = "i2c2";
|
|
function = "i2c2";
|
|
};
|
|
|
|
usb0_pins: usb0 {
|
|
groups = "usb0";
|
|
function = "usb0";
|
|
};
|
|
|
|
usb1_pins: usb1 {
|
|
groups = "usb1";
|
|
function = "usb1";
|
|
};
|
|
|
|
vin0_pins: vin0 {
|
|
groups = "vin0_data8", "vin0_clk";
|
|
function = "vin0";
|
|
};
|
|
|
|
can0_pins: can0 {
|
|
groups = "can0_data";
|
|
function = "can0";
|
|
};
|
|
|
|
du_pins: du {
|
|
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
|
|
function = "du";
|
|
};
|
|
|
|
ssi_pins: sound {
|
|
groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
|
|
function = "ssi";
|
|
};
|
|
|
|
audio_clk_pins: audio_clk {
|
|
groups = "audio_clk_a";
|
|
function = "audio_clk";
|
|
};
|
|
};
|
|
|
|
&scif0 {
|
|
pinctrl-0 = <&scif0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
ðer {
|
|
pinctrl-0 = <ðer_pins &phy1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
phy-handle = <&phy1>;
|
|
renesas,ether-link-active-low;
|
|
status = "okay";
|
|
|
|
phy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
interrupt-parent = <&irqc0>;
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
micrel,led-mode = <1>;
|
|
};
|
|
};
|
|
|
|
&sdhi0 {
|
|
pinctrl-0 = <&sdhi0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
vmmc-supply = <&vcc_sdhi0>;
|
|
vqmmc-supply = <&vccq_sdhi0>;
|
|
cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
|
|
wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sdhi2 {
|
|
pinctrl-0 = <&sdhi2_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
vmmc-supply = <&vcc_sdhi2>;
|
|
vqmmc-supply = <&vccq_sdhi2>;
|
|
cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
&qspi {
|
|
pinctrl-0 = <&qspi_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "spansion,s25fl512s", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <30000000>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
m25p,fast-read;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "loader_prg";
|
|
reg = <0x00000000 0x00040000>;
|
|
read-only;
|
|
};
|
|
partition@40000 {
|
|
label = "user_prg";
|
|
reg = <0x00040000 0x00400000>;
|
|
read-only;
|
|
};
|
|
partition@440000 {
|
|
label = "flash_fs";
|
|
reg = <0x00440000 0x03bc0000>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
pinctrl-0 = <&i2c2_pins>;
|
|
pinctrl-names = "i2c-hdmi";
|
|
|
|
clock-frequency = <400000>;
|
|
};
|
|
|
|
&sata0 {
|
|
status = "okay";
|
|
};
|
|
|
|
/* composite video input */
|
|
&vin0 {
|
|
status = "okay";
|
|
pinctrl-0 = <&vin0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
port {
|
|
vin0ep: endpoint {
|
|
remote-endpoint = <&adv7180>;
|
|
bus-width = <8>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pci0 {
|
|
pinctrl-0 = <&usb0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&pci1 {
|
|
pinctrl-0 = <&usb1_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&hsusb {
|
|
pinctrl-0 = <&usb0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie_bus_clk {
|
|
clock-frequency = <100000000>;
|
|
};
|
|
|
|
&pciec {
|
|
status = "okay";
|
|
};
|
|
|
|
&can0 {
|
|
pinctrl-0 = <&can0_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
status = "okay";
|
|
};
|
|
|
|
&du {
|
|
pinctrl-0 = <&du_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
|
<&x3_clk>, <&x16_clk>;
|
|
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
|
|
|
|
ports {
|
|
port@0 {
|
|
endpoint {
|
|
remote-endpoint = <&adv7511_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&lvds0 {
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@1 {
|
|
lvds_connector: endpoint {
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&rcar_sound {
|
|
pinctrl-0 = <&ssi_pins &audio_clk_pins>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
|
|
/* Single DAI */
|
|
#sound-dai-cells = <0>;
|
|
|
|
rcar_sound,dai {
|
|
dai0 {
|
|
playback = <&ssi0>;
|
|
capture = <&ssi1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&rwdt {
|
|
timeout-sec = <60>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
shared-pin;
|
|
};
|