mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 01:41:30 +07:00
1830374e13
Replace the racy continuation check within retire_work with a definite
kill-switch on idling. The race was being exposed by gem_concurrent_blit
where the retire_worker would be terminated too early leaving us
spinning in debugfs/i915_drop_caches with nothing flushing the
retirement queue.
Although that the igt is trying to idle from one child while submitting
from another may be a contributing factor as to why it runs so slowly...
v2: Use the non-sync version of cancel_delayed_work(), we only need to
stop it from being scheduled as we independently check whether now is
the right time to be parking.
Testcase: igt/gem_concurrent_blit
Fixes: 79ffac8599
("drm/i915: Invert the GEM wakeref hierarchy")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190507121108.18377-3-chris@chris-wilson.co.uk
251 lines
6.2 KiB
C
251 lines
6.2 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#include "gt/intel_gt_pm.h"
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#include "i915_drv.h"
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#include "i915_gem_pm.h"
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#include "i915_globals.h"
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static void i915_gem_park(struct drm_i915_private *i915)
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{
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struct intel_engine_cs *engine;
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enum intel_engine_id id;
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lockdep_assert_held(&i915->drm.struct_mutex);
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for_each_engine(engine, i915, id)
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i915_gem_batch_pool_fini(&engine->batch_pool);
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i915_timelines_park(i915);
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i915_vma_parked(i915);
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i915_globals_park();
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}
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static void idle_work_handler(struct work_struct *work)
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{
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struct drm_i915_private *i915 =
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container_of(work, typeof(*i915), gem.idle_work);
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bool restart = true;
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cancel_delayed_work(&i915->gem.retire_work);
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mutex_lock(&i915->drm.struct_mutex);
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intel_wakeref_lock(&i915->gt.wakeref);
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if (!intel_wakeref_active(&i915->gt.wakeref) && !work_pending(work)) {
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i915_gem_park(i915);
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restart = false;
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}
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intel_wakeref_unlock(&i915->gt.wakeref);
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mutex_unlock(&i915->drm.struct_mutex);
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if (restart)
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queue_delayed_work(i915->wq,
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&i915->gem.retire_work,
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round_jiffies_up_relative(HZ));
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}
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static void retire_work_handler(struct work_struct *work)
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{
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struct drm_i915_private *i915 =
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container_of(work, typeof(*i915), gem.retire_work.work);
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/* Come back later if the device is busy... */
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if (mutex_trylock(&i915->drm.struct_mutex)) {
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i915_retire_requests(i915);
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mutex_unlock(&i915->drm.struct_mutex);
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}
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queue_delayed_work(i915->wq,
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&i915->gem.retire_work,
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round_jiffies_up_relative(HZ));
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}
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static int pm_notifier(struct notifier_block *nb,
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unsigned long action,
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void *data)
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{
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struct drm_i915_private *i915 =
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container_of(nb, typeof(*i915), gem.pm_notifier);
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switch (action) {
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case INTEL_GT_UNPARK:
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i915_globals_unpark();
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queue_delayed_work(i915->wq,
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&i915->gem.retire_work,
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round_jiffies_up_relative(HZ));
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break;
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case INTEL_GT_PARK:
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queue_work(i915->wq, &i915->gem.idle_work);
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break;
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}
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return NOTIFY_OK;
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}
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static bool switch_to_kernel_context_sync(struct drm_i915_private *i915)
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{
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bool result = true;
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do {
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if (i915_gem_wait_for_idle(i915,
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I915_WAIT_LOCKED |
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I915_WAIT_FOR_IDLE_BOOST,
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I915_GEM_IDLE_TIMEOUT) == -ETIME) {
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/* XXX hide warning from gem_eio */
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if (i915_modparams.reset) {
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dev_err(i915->drm.dev,
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"Failed to idle engines, declaring wedged!\n");
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GEM_TRACE_DUMP();
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}
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/*
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* Forcibly cancel outstanding work and leave
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* the gpu quiet.
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*/
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i915_gem_set_wedged(i915);
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result = false;
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}
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} while (i915_retire_requests(i915) && result);
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GEM_BUG_ON(i915->gt.awake);
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return result;
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}
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bool i915_gem_load_power_context(struct drm_i915_private *i915)
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{
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return switch_to_kernel_context_sync(i915);
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}
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void i915_gem_suspend(struct drm_i915_private *i915)
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{
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GEM_TRACE("\n");
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flush_workqueue(i915->wq);
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mutex_lock(&i915->drm.struct_mutex);
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/*
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* We have to flush all the executing contexts to main memory so
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* that they can saved in the hibernation image. To ensure the last
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* context image is coherent, we have to switch away from it. That
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* leaves the i915->kernel_context still active when
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* we actually suspend, and its image in memory may not match the GPU
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* state. Fortunately, the kernel_context is disposable and we do
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* not rely on its state.
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*/
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switch_to_kernel_context_sync(i915);
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mutex_unlock(&i915->drm.struct_mutex);
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/*
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* Assert that we successfully flushed all the work and
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* reset the GPU back to its idle, low power state.
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*/
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GEM_BUG_ON(i915->gt.awake);
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flush_work(&i915->gem.idle_work);
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cancel_delayed_work_sync(&i915->gpu_error.hangcheck_work);
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i915_gem_drain_freed_objects(i915);
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intel_uc_suspend(i915);
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}
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void i915_gem_suspend_late(struct drm_i915_private *i915)
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{
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struct drm_i915_gem_object *obj;
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struct list_head *phases[] = {
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&i915->mm.unbound_list,
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&i915->mm.bound_list,
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NULL
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}, **phase;
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/*
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* Neither the BIOS, ourselves or any other kernel
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* expects the system to be in execlists mode on startup,
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* so we need to reset the GPU back to legacy mode. And the only
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* known way to disable logical contexts is through a GPU reset.
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*
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* So in order to leave the system in a known default configuration,
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* always reset the GPU upon unload and suspend. Afterwards we then
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* clean up the GEM state tracking, flushing off the requests and
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* leaving the system in a known idle state.
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*
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* Note that is of the upmost importance that the GPU is idle and
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* all stray writes are flushed *before* we dismantle the backing
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* storage for the pinned objects.
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*
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* However, since we are uncertain that resetting the GPU on older
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* machines is a good idea, we don't - just in case it leaves the
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* machine in an unusable condition.
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*/
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mutex_lock(&i915->drm.struct_mutex);
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for (phase = phases; *phase; phase++) {
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list_for_each_entry(obj, *phase, mm.link)
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WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
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}
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mutex_unlock(&i915->drm.struct_mutex);
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intel_uc_sanitize(i915);
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i915_gem_sanitize(i915);
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}
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void i915_gem_resume(struct drm_i915_private *i915)
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{
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GEM_TRACE("\n");
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WARN_ON(i915->gt.awake);
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mutex_lock(&i915->drm.struct_mutex);
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intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
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i915_gem_restore_gtt_mappings(i915);
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i915_gem_restore_fences(i915);
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/*
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* As we didn't flush the kernel context before suspend, we cannot
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* guarantee that the context image is complete. So let's just reset
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* it and start again.
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*/
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intel_gt_resume(i915);
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if (i915_gem_init_hw(i915))
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goto err_wedged;
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intel_uc_resume(i915);
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/* Always reload a context for powersaving. */
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if (!i915_gem_load_power_context(i915))
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goto err_wedged;
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out_unlock:
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intel_uncore_forcewake_put(&i915->uncore, FORCEWAKE_ALL);
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mutex_unlock(&i915->drm.struct_mutex);
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return;
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err_wedged:
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if (!i915_reset_failed(i915)) {
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dev_err(i915->drm.dev,
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"Failed to re-initialize GPU, declaring it wedged!\n");
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i915_gem_set_wedged(i915);
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}
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goto out_unlock;
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}
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void i915_gem_init__pm(struct drm_i915_private *i915)
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{
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INIT_WORK(&i915->gem.idle_work, idle_work_handler);
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INIT_DELAYED_WORK(&i915->gem.retire_work, retire_work_handler);
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i915->gem.pm_notifier.notifier_call = pm_notifier;
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blocking_notifier_chain_register(&i915->gt.pm_notifications,
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&i915->gem.pm_notifier);
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}
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