Zhenyu Wang 5ad59bf096 drm/i915/gvt: Fix PTE write flush for taking runtime pm properly ... Make sure to take runtime pm when write PTE flush which ensure to write to hw properly. This fixes warning during mdev/vgpu creation which will do ggtt reset. ------------[ cut here ]------------ WARNING: CPU: 1 PID: 9375 at drivers/gpu/drm/i915/intel_drv.h:1748 fwtable_write32+0x1c2/0x1e0 [i915] RPM wakelock ref not held during HW access Call Trace: ? dump_stack+0x5c/0x81 ? __warn+0xbe/0xe0 ? warn_slowpath_fmt+0x5a/0x80 ? wake_up_klogd+0x37/0x40 ? vprintk_emit+0x2ef/0x370 ? fwtable_write32+0x1c2/0x1e0 [i915] ? gtt_set_entry64+0xbb/0xd0 [i915] ? intel_vgpu_reset_ggtt+0x88/0xf0 [i915] ? intel_vgpu_init_gtt+0xa5/0x4f0 [i915] ? intel_gvt_create_vgpu+0x1b5/0x250 [i915] ? kobject_put+0x1b/0x50 ? intel_vgpu_create+0x4e/0x130 [kvmgt] ? mdev_device_create+0x186/0x2a0 [mdev] ? create_store+0xba/0xe0 [mdev] ? create_store+0xba/0xe0 [mdev] ? kernfs_fop_write+0x109/0x1a0 ? kernfs_fop_write+0x109/0x1a0 ? __vfs_write+0x33/0x160 ? __fput+0x161/0x1d0 ? vfs_write+0xb0/0x190 ? SyS_write+0x52/0xc0 ? exit_to_usermode_loop+0x7a/0xa0 ? entry_SYSCALL_64_fastpath+0x1e/0xad v2: remove unrelated oops info v3: change to take runtime pm for ggtt reset instead of get/put for each pte write flush Fixes: d650ac0602 ("drm/i915/gvt: reset the GGTT entry when vGPU created") Cc: Ping Gao <ping.a.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>		2017-04-13 14:02:44 +08:00
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drm	drm/i915/gvt: Fix PTE write flush for taking runtime pm properly	2017-04-13 14:02:44 +08:00
host1x
ipu-v3	gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent	2017-03-16 10:14:49 +01:00
vga	Pointer for Markus's image conversion work.	2017-03-14 15:07:33 +01:00
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