Madhav Chauhan 5a8507b5aa drm/i915/icl: Configure DSI Dual link mode ... This patch configures DSI video mode dual link by programming DSS_CTL registers. v2: Use new bitfield definitions from Anusha's patch Correct register to be programmed and use max depth buffer value (James) v3 by Jani: - checkpatch fixes Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/d8962f4e1beffc2099b8bef8cb5a5191aa1d9efd.1543500286.git.jani.nikula@intel.com		2018-12-03 15:54:30 +02:00
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drm	drm/i915/icl: Configure DSI Dual link mode	2018-12-03 15:54:30 +02:00
host1x	gpu: host1x: Detach Host1x from IOMMU DMA domain on arm32	2018-09-26 17:11:14 +02:00
ipu-v3	media: v4l: mediabus: Recognise CSI-2 D-PHY and C-PHY	2018-10-04 16:06:15 -04:00
vga	drm-misc-next for v4.21, part 1:	2018-11-19 10:40:33 +10:00
Makefile