mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 09:15:03 +07:00
5a7a8426b2
Currently GIC backend is selected via alternative framework and this is fine. We are going to introduce vgic-v3 to 32-bit world and there we don't have patching framework in hand, so we can either check support for GICv3 every time we need to choose which backend to use or try to optimise it by using static keys. The later looks quite promising because we can share logic involved in selecting GIC backend between architectures if both uses static keys. This patch moves arm64 from alternative to static keys framework for selecting GIC backend. For that we embed static key into vgic_global and enable the key during vgic initialisation based on what has already been exposed by the host GIC driver. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
714 lines
18 KiB
C
714 lines
18 KiB
C
/*
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* Copyright (C) 2015, 2016 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/list_sort.h>
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#include "vgic.h"
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#define CREATE_TRACE_POINTS
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#include "../trace.h"
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#ifdef CONFIG_DEBUG_SPINLOCK
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#define DEBUG_SPINLOCK_BUG_ON(p) BUG_ON(p)
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#else
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#define DEBUG_SPINLOCK_BUG_ON(p)
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#endif
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struct vgic_global __section(.hyp.text) kvm_vgic_global_state = {.gicv3_cpuif = STATIC_KEY_FALSE_INIT,};
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/*
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* Locking order is always:
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* its->cmd_lock (mutex)
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* its->its_lock (mutex)
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* vgic_cpu->ap_list_lock
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* kvm->lpi_list_lock
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* vgic_irq->irq_lock
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*
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* If you need to take multiple locks, always take the upper lock first,
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* then the lower ones, e.g. first take the its_lock, then the irq_lock.
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* If you are already holding a lock and need to take a higher one, you
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* have to drop the lower ranking lock first and re-aquire it after having
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* taken the upper one.
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*
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* When taking more than one ap_list_lock at the same time, always take the
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* lowest numbered VCPU's ap_list_lock first, so:
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* vcpuX->vcpu_id < vcpuY->vcpu_id:
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* spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock);
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* spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock);
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*/
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/*
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* Iterate over the VM's list of mapped LPIs to find the one with a
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* matching interrupt ID and return a reference to the IRQ structure.
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*/
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static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct vgic_irq *irq = NULL;
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spin_lock(&dist->lpi_list_lock);
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list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) {
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if (irq->intid != intid)
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continue;
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/*
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* This increases the refcount, the caller is expected to
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* call vgic_put_irq() later once it's finished with the IRQ.
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*/
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vgic_get_irq_kref(irq);
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goto out_unlock;
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}
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irq = NULL;
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out_unlock:
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spin_unlock(&dist->lpi_list_lock);
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return irq;
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}
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/*
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* This looks up the virtual interrupt ID to get the corresponding
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* struct vgic_irq. It also increases the refcount, so any caller is expected
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* to call vgic_put_irq() once it's finished with this IRQ.
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*/
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struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
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u32 intid)
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{
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/* SGIs and PPIs */
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if (intid <= VGIC_MAX_PRIVATE)
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return &vcpu->arch.vgic_cpu.private_irqs[intid];
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/* SPIs */
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if (intid <= VGIC_MAX_SPI)
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return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS];
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/* LPIs */
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if (intid >= VGIC_MIN_LPI)
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return vgic_get_lpi(kvm, intid);
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WARN(1, "Looking up struct vgic_irq for reserved INTID");
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return NULL;
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}
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/*
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* We can't do anything in here, because we lack the kvm pointer to
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* lock and remove the item from the lpi_list. So we keep this function
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* empty and use the return value of kref_put() to trigger the freeing.
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*/
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static void vgic_irq_release(struct kref *ref)
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{
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}
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void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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if (irq->intid < VGIC_MIN_LPI)
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return;
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spin_lock(&dist->lpi_list_lock);
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if (!kref_put(&irq->refcount, vgic_irq_release)) {
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spin_unlock(&dist->lpi_list_lock);
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return;
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};
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list_del(&irq->lpi_list);
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dist->lpi_list_count--;
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spin_unlock(&dist->lpi_list_lock);
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kfree(irq);
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}
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/**
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* kvm_vgic_target_oracle - compute the target vcpu for an irq
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*
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* @irq: The irq to route. Must be already locked.
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*
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* Based on the current state of the interrupt (enabled, pending,
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* active, vcpu and target_vcpu), compute the next vcpu this should be
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* given to. Return NULL if this shouldn't be injected at all.
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*
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* Requires the IRQ lock to be held.
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*/
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static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq)
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{
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DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
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/* If the interrupt is active, it must stay on the current vcpu */
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if (irq->active)
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return irq->vcpu ? : irq->target_vcpu;
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/*
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* If the IRQ is not active but enabled and pending, we should direct
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* it to its configured target VCPU.
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* If the distributor is disabled, pending interrupts shouldn't be
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* forwarded.
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*/
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if (irq->enabled && irq->pending) {
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if (unlikely(irq->target_vcpu &&
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!irq->target_vcpu->kvm->arch.vgic.enabled))
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return NULL;
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return irq->target_vcpu;
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}
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/* If neither active nor pending and enabled, then this IRQ should not
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* be queued to any VCPU.
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*/
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return NULL;
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}
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/*
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* The order of items in the ap_lists defines how we'll pack things in LRs as
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* well, the first items in the list being the first things populated in the
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* LRs.
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*
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* A hard rule is that active interrupts can never be pushed out of the LRs
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* (and therefore take priority) since we cannot reliably trap on deactivation
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* of IRQs and therefore they have to be present in the LRs.
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*
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* Otherwise things should be sorted by the priority field and the GIC
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* hardware support will take care of preemption of priority groups etc.
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*
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* Return negative if "a" sorts before "b", 0 to preserve order, and positive
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* to sort "b" before "a".
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*/
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static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b)
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{
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struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list);
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struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list);
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bool penda, pendb;
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int ret;
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spin_lock(&irqa->irq_lock);
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spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING);
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if (irqa->active || irqb->active) {
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ret = (int)irqb->active - (int)irqa->active;
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goto out;
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}
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penda = irqa->enabled && irqa->pending;
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pendb = irqb->enabled && irqb->pending;
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if (!penda || !pendb) {
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ret = (int)pendb - (int)penda;
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goto out;
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}
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/* Both pending and enabled, sort by priority */
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ret = irqa->priority - irqb->priority;
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out:
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spin_unlock(&irqb->irq_lock);
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spin_unlock(&irqa->irq_lock);
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return ret;
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}
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/* Must be called with the ap_list_lock held */
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static void vgic_sort_ap_list(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
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list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp);
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}
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/*
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* Only valid injection if changing level for level-triggered IRQs or for a
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* rising edge.
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*/
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static bool vgic_validate_injection(struct vgic_irq *irq, bool level)
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{
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switch (irq->config) {
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case VGIC_CONFIG_LEVEL:
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return irq->line_level != level;
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case VGIC_CONFIG_EDGE:
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return level;
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}
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return false;
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}
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/*
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* Check whether an IRQ needs to (and can) be queued to a VCPU's ap list.
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* Do the queuing if necessary, taking the right locks in the right order.
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* Returns true when the IRQ was queued, false otherwise.
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*
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* Needs to be entered with the IRQ lock already held, but will return
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* with all locks dropped.
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*/
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bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq)
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{
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struct kvm_vcpu *vcpu;
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DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
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retry:
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vcpu = vgic_target_oracle(irq);
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if (irq->vcpu || !vcpu) {
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/*
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* If this IRQ is already on a VCPU's ap_list, then it
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* cannot be moved or modified and there is no more work for
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* us to do.
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*
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* Otherwise, if the irq is not pending and enabled, it does
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* not need to be inserted into an ap_list and there is also
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* no more work for us to do.
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*/
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spin_unlock(&irq->irq_lock);
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return false;
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}
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/*
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* We must unlock the irq lock to take the ap_list_lock where
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* we are going to insert this new pending interrupt.
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*/
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spin_unlock(&irq->irq_lock);
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/* someone can do stuff here, which we re-check below */
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spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
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spin_lock(&irq->irq_lock);
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/*
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* Did something change behind our backs?
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*
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* There are two cases:
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* 1) The irq lost its pending state or was disabled behind our
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* backs and/or it was queued to another VCPU's ap_list.
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* 2) Someone changed the affinity on this irq behind our
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* backs and we are now holding the wrong ap_list_lock.
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*
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* In both cases, drop the locks and retry.
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*/
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if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) {
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spin_unlock(&irq->irq_lock);
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spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
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spin_lock(&irq->irq_lock);
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goto retry;
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}
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/*
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* Grab a reference to the irq to reflect the fact that it is
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* now in the ap_list.
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*/
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vgic_get_irq_kref(irq);
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list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head);
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irq->vcpu = vcpu;
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spin_unlock(&irq->irq_lock);
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spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
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kvm_vcpu_kick(vcpu);
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return true;
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}
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static int vgic_update_irq_pending(struct kvm *kvm, int cpuid,
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unsigned int intid, bool level,
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bool mapped_irq)
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{
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struct kvm_vcpu *vcpu;
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struct vgic_irq *irq;
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int ret;
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trace_vgic_update_irq_pending(cpuid, intid, level);
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ret = vgic_lazy_init(kvm);
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if (ret)
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return ret;
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vcpu = kvm_get_vcpu(kvm, cpuid);
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if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
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return -EINVAL;
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irq = vgic_get_irq(kvm, vcpu, intid);
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if (!irq)
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return -EINVAL;
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if (irq->hw != mapped_irq) {
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vgic_put_irq(kvm, irq);
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return -EINVAL;
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}
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spin_lock(&irq->irq_lock);
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if (!vgic_validate_injection(irq, level)) {
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/* Nothing to see here, move along... */
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spin_unlock(&irq->irq_lock);
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vgic_put_irq(kvm, irq);
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return 0;
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}
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if (irq->config == VGIC_CONFIG_LEVEL) {
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irq->line_level = level;
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irq->pending = level || irq->soft_pending;
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} else {
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irq->pending = true;
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}
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vgic_queue_irq_unlock(kvm, irq);
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vgic_put_irq(kvm, irq);
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return 0;
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}
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/**
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* kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic
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* @kvm: The VM structure pointer
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* @cpuid: The CPU for PPIs
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* @intid: The INTID to inject a new state to.
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* @level: Edge-triggered: true: to trigger the interrupt
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* false: to ignore the call
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* Level-sensitive true: raise the input signal
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* false: lower the input signal
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*
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* The VGIC is not concerned with devices being active-LOW or active-HIGH for
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* level-sensitive interrupts. You can think of the level parameter as 1
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* being HIGH and 0 being LOW and all devices being active-HIGH.
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*/
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int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
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bool level)
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{
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return vgic_update_irq_pending(kvm, cpuid, intid, level, false);
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}
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int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, unsigned int intid,
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bool level)
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{
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return vgic_update_irq_pending(kvm, cpuid, intid, level, true);
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}
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int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, u32 virt_irq, u32 phys_irq)
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{
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struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
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BUG_ON(!irq);
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spin_lock(&irq->irq_lock);
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irq->hw = true;
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irq->hwintid = phys_irq;
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spin_unlock(&irq->irq_lock);
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vgic_put_irq(vcpu->kvm, irq);
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return 0;
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}
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int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int virt_irq)
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{
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struct vgic_irq *irq;
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if (!vgic_initialized(vcpu->kvm))
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return -EAGAIN;
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irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
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BUG_ON(!irq);
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spin_lock(&irq->irq_lock);
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irq->hw = false;
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irq->hwintid = 0;
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spin_unlock(&irq->irq_lock);
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vgic_put_irq(vcpu->kvm, irq);
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return 0;
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}
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/**
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* vgic_prune_ap_list - Remove non-relevant interrupts from the list
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*
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* @vcpu: The VCPU pointer
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*
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* Go over the list of "interesting" interrupts, and prune those that we
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* won't have to consider in the near future.
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*/
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static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_irq *irq, *tmp;
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retry:
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spin_lock(&vgic_cpu->ap_list_lock);
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list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
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struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
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spin_lock(&irq->irq_lock);
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BUG_ON(vcpu != irq->vcpu);
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target_vcpu = vgic_target_oracle(irq);
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if (!target_vcpu) {
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/*
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* We don't need to process this interrupt any
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* further, move it off the list.
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*/
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list_del(&irq->ap_list);
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irq->vcpu = NULL;
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spin_unlock(&irq->irq_lock);
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/*
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* This vgic_put_irq call matches the
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* vgic_get_irq_kref in vgic_queue_irq_unlock,
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* where we added the LPI to the ap_list. As
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* we remove the irq from the list, we drop
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* also drop the refcount.
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*/
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vgic_put_irq(vcpu->kvm, irq);
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continue;
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}
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if (target_vcpu == vcpu) {
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/* We're on the right CPU */
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spin_unlock(&irq->irq_lock);
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continue;
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}
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/* This interrupt looks like it has to be migrated. */
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spin_unlock(&irq->irq_lock);
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spin_unlock(&vgic_cpu->ap_list_lock);
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/*
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* Ensure locking order by always locking the smallest
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* ID first.
|
|
*/
|
|
if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
|
|
vcpuA = vcpu;
|
|
vcpuB = target_vcpu;
|
|
} else {
|
|
vcpuA = target_vcpu;
|
|
vcpuB = vcpu;
|
|
}
|
|
|
|
spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock);
|
|
spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock,
|
|
SINGLE_DEPTH_NESTING);
|
|
spin_lock(&irq->irq_lock);
|
|
|
|
/*
|
|
* If the affinity has been preserved, move the
|
|
* interrupt around. Otherwise, it means things have
|
|
* changed while the interrupt was unlocked, and we
|
|
* need to replay this.
|
|
*
|
|
* In all cases, we cannot trust the list not to have
|
|
* changed, so we restart from the beginning.
|
|
*/
|
|
if (target_vcpu == vgic_target_oracle(irq)) {
|
|
struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
|
|
|
|
list_del(&irq->ap_list);
|
|
irq->vcpu = target_vcpu;
|
|
list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
|
|
}
|
|
|
|
spin_unlock(&irq->irq_lock);
|
|
spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
|
|
spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock);
|
|
goto retry;
|
|
}
|
|
|
|
spin_unlock(&vgic_cpu->ap_list_lock);
|
|
}
|
|
|
|
static inline void vgic_process_maintenance_interrupt(struct kvm_vcpu *vcpu)
|
|
{
|
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
|
vgic_v2_process_maintenance(vcpu);
|
|
else
|
|
vgic_v3_process_maintenance(vcpu);
|
|
}
|
|
|
|
static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
|
|
{
|
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
|
vgic_v2_fold_lr_state(vcpu);
|
|
else
|
|
vgic_v3_fold_lr_state(vcpu);
|
|
}
|
|
|
|
/* Requires the irq_lock to be held. */
|
|
static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
|
|
struct vgic_irq *irq, int lr)
|
|
{
|
|
DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
|
|
|
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
|
vgic_v2_populate_lr(vcpu, irq, lr);
|
|
else
|
|
vgic_v3_populate_lr(vcpu, irq, lr);
|
|
}
|
|
|
|
static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
|
|
{
|
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
|
vgic_v2_clear_lr(vcpu, lr);
|
|
else
|
|
vgic_v3_clear_lr(vcpu, lr);
|
|
}
|
|
|
|
static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
|
|
{
|
|
if (kvm_vgic_global_state.type == VGIC_V2)
|
|
vgic_v2_set_underflow(vcpu);
|
|
else
|
|
vgic_v3_set_underflow(vcpu);
|
|
}
|
|
|
|
/* Requires the ap_list_lock to be held. */
|
|
static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
|
|
struct vgic_irq *irq;
|
|
int count = 0;
|
|
|
|
DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
|
|
|
|
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
|
|
spin_lock(&irq->irq_lock);
|
|
/* GICv2 SGIs can count for more than one... */
|
|
if (vgic_irq_is_sgi(irq->intid) && irq->source)
|
|
count += hweight8(irq->source);
|
|
else
|
|
count++;
|
|
spin_unlock(&irq->irq_lock);
|
|
}
|
|
return count;
|
|
}
|
|
|
|
/* Requires the VCPU's ap_list_lock to be held. */
|
|
static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
|
|
struct vgic_irq *irq;
|
|
int count = 0;
|
|
|
|
DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
|
|
|
|
if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr) {
|
|
vgic_set_underflow(vcpu);
|
|
vgic_sort_ap_list(vcpu);
|
|
}
|
|
|
|
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
|
|
spin_lock(&irq->irq_lock);
|
|
|
|
if (unlikely(vgic_target_oracle(irq) != vcpu))
|
|
goto next;
|
|
|
|
/*
|
|
* If we get an SGI with multiple sources, try to get
|
|
* them in all at once.
|
|
*/
|
|
do {
|
|
vgic_populate_lr(vcpu, irq, count++);
|
|
} while (irq->source && count < kvm_vgic_global_state.nr_lr);
|
|
|
|
next:
|
|
spin_unlock(&irq->irq_lock);
|
|
|
|
if (count == kvm_vgic_global_state.nr_lr)
|
|
break;
|
|
}
|
|
|
|
vcpu->arch.vgic_cpu.used_lrs = count;
|
|
|
|
/* Nuke remaining LRs */
|
|
for ( ; count < kvm_vgic_global_state.nr_lr; count++)
|
|
vgic_clear_lr(vcpu, count);
|
|
}
|
|
|
|
/* Sync back the hardware VGIC state into our emulation after a guest's run. */
|
|
void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
|
|
{
|
|
vgic_process_maintenance_interrupt(vcpu);
|
|
vgic_fold_lr_state(vcpu);
|
|
vgic_prune_ap_list(vcpu);
|
|
}
|
|
|
|
/* Flush our emulation state into the GIC hardware before entering the guest. */
|
|
void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
|
|
{
|
|
spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
|
|
vgic_flush_lr_state(vcpu);
|
|
spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
|
|
}
|
|
|
|
int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
|
|
struct vgic_irq *irq;
|
|
bool pending = false;
|
|
|
|
if (!vcpu->kvm->arch.vgic.enabled)
|
|
return false;
|
|
|
|
spin_lock(&vgic_cpu->ap_list_lock);
|
|
|
|
list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
|
|
spin_lock(&irq->irq_lock);
|
|
pending = irq->pending && irq->enabled;
|
|
spin_unlock(&irq->irq_lock);
|
|
|
|
if (pending)
|
|
break;
|
|
}
|
|
|
|
spin_unlock(&vgic_cpu->ap_list_lock);
|
|
|
|
return pending;
|
|
}
|
|
|
|
void vgic_kick_vcpus(struct kvm *kvm)
|
|
{
|
|
struct kvm_vcpu *vcpu;
|
|
int c;
|
|
|
|
/*
|
|
* We've injected an interrupt, time to find out who deserves
|
|
* a good kick...
|
|
*/
|
|
kvm_for_each_vcpu(c, vcpu, kvm) {
|
|
if (kvm_vgic_vcpu_pending_irq(vcpu))
|
|
kvm_vcpu_kick(vcpu);
|
|
}
|
|
}
|
|
|
|
bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int virt_irq)
|
|
{
|
|
struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, virt_irq);
|
|
bool map_is_active;
|
|
|
|
spin_lock(&irq->irq_lock);
|
|
map_is_active = irq->hw && irq->active;
|
|
spin_unlock(&irq->irq_lock);
|
|
vgic_put_irq(vcpu->kvm, irq);
|
|
|
|
return map_is_active;
|
|
}
|
|
|