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3677d4c6a2
In this initial implementation we force-require 5-level paging support from the hardware, when compiled with CONFIG_X86_5LEVEL=y. (The kernel will panic during boot on CPUs that don't support 5-level paging.) We will implement boot-time switch between 4- and 5-level paging later. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-arch@vger.kernel.org Cc: linux-mm@kvack.org Link: http://lkml.kernel.org/r/20170330080731.65421-2-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
112 lines
2.8 KiB
C
112 lines
2.8 KiB
C
#ifndef _ASM_X86_REQUIRED_FEATURES_H
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#define _ASM_X86_REQUIRED_FEATURES_H
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/* Define minimum CPUID feature set for kernel These bits are checked
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really early to actually display a visible error message before the
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kernel dies. Make sure to assign features to the proper mask!
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Some requirements that are not in CPUID yet are also in the
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CONFIG_X86_MINIMUM_CPU_FAMILY which is checked too.
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The real information is in arch/x86/Kconfig.cpu, this just converts
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the CONFIGs into a bitmask */
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#ifndef CONFIG_MATH_EMULATION
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# define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
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#else
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# define NEED_FPU 0
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#endif
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#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
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# define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
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#else
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# define NEED_PAE 0
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#endif
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#ifdef CONFIG_X86_CMPXCHG64
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# define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
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#else
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# define NEED_CX8 0
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#endif
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#if defined(CONFIG_X86_CMOV) || defined(CONFIG_X86_64)
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# define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
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#else
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# define NEED_CMOV 0
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#endif
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#ifdef CONFIG_X86_USE_3DNOW
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# define NEED_3DNOW (1<<(X86_FEATURE_3DNOW & 31))
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#else
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# define NEED_3DNOW 0
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#endif
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#if defined(CONFIG_X86_P6_NOP) || defined(CONFIG_X86_64)
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# define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
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#else
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# define NEED_NOPL 0
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#endif
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#ifdef CONFIG_MATOM
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# define NEED_MOVBE (1<<(X86_FEATURE_MOVBE & 31))
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#else
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# define NEED_MOVBE 0
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#endif
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#ifdef CONFIG_X86_5LEVEL
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# define NEED_LA57 (1<<(X86_FEATURE_LA57 & 31))
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#else
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# define NEED_LA57 0
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#endif
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_PARAVIRT
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/* Paravirtualized systems may not have PSE or PGE available */
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#define NEED_PSE 0
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#define NEED_PGE 0
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#else
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#define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
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#define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
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#endif
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#define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
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#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31))
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#define NEED_XMM (1<<(X86_FEATURE_XMM & 31))
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#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31))
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#define NEED_LM (1<<(X86_FEATURE_LM & 31))
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#else
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#define NEED_PSE 0
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#define NEED_MSR 0
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#define NEED_PGE 0
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#define NEED_FXSR 0
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#define NEED_XMM 0
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#define NEED_XMM2 0
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#define NEED_LM 0
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#endif
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#define REQUIRED_MASK0 (NEED_FPU|NEED_PSE|NEED_MSR|NEED_PAE|\
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NEED_CX8|NEED_PGE|NEED_FXSR|NEED_CMOV|\
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NEED_XMM|NEED_XMM2)
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#define SSE_MASK (NEED_XMM|NEED_XMM2)
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#define REQUIRED_MASK1 (NEED_LM|NEED_3DNOW)
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#define REQUIRED_MASK2 0
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#define REQUIRED_MASK3 (NEED_NOPL)
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#define REQUIRED_MASK4 (NEED_MOVBE)
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#define REQUIRED_MASK5 0
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#define REQUIRED_MASK6 0
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#define REQUIRED_MASK7 0
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#define REQUIRED_MASK8 0
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#define REQUIRED_MASK9 0
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#define REQUIRED_MASK10 0
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#define REQUIRED_MASK11 0
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#define REQUIRED_MASK12 0
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#define REQUIRED_MASK13 0
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#define REQUIRED_MASK14 0
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#define REQUIRED_MASK15 0
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#define REQUIRED_MASK16 (NEED_LA57)
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#define REQUIRED_MASK17 0
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#define REQUIRED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 18)
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#endif /* _ASM_X86_REQUIRED_FEATURES_H */
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