mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 09:24:37 +07:00
efed421a94
This patch adds a UDC driver for Broadcom's USB3.0 Peripheral core named BDC. BDC supports control traffic on ep0 and bulk/Int/Isoch traffic on all other endpoints. [ balbi@ti.com : fix build error on randconfig due to lack of <linux/dmapool.h> ] Signed-off-by: Ashwini Pahuja <ashwini.linux@gmail.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
124 lines
3.5 KiB
C
124 lines
3.5 KiB
C
/*
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* bdc_dbg.c - BRCM BDC USB3.0 device controller debug functions
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*
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* Copyright (C) 2014 Broadcom Corporation
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*
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* Author: Ashwini Pahuja
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include "bdc.h"
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#include "bdc_dbg.h"
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void bdc_dbg_regs(struct bdc *bdc)
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{
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u32 temp;
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dev_vdbg(bdc->dev, "bdc->regs:%p\n", bdc->regs);
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temp = bdc_readl(bdc->regs, BDC_BDCCFG0);
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dev_vdbg(bdc->dev, "bdccfg0:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_BDCCFG1);
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dev_vdbg(bdc->dev, "bdccfg1:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_BDCCAP0);
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dev_vdbg(bdc->dev, "bdccap0:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_BDCCAP1);
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dev_vdbg(bdc->dev, "bdccap1:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_USPC);
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dev_vdbg(bdc->dev, "uspc:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_DVCSA);
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dev_vdbg(bdc->dev, "dvcsa:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_DVCSB);
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dev_vdbg(bdc->dev, "dvcsb:0x%x08\n", temp);
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}
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void bdc_dump_epsts(struct bdc *bdc)
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{
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u32 temp;
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temp = bdc_readl(bdc->regs, BDC_EPSTS0(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS0:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS1(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS1:0x%x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS2(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS2:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS3(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS3:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS4(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS4:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS5(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS5:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS6(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS6:0x%08x\n", temp);
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temp = bdc_readl(bdc->regs, BDC_EPSTS7(0));
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dev_vdbg(bdc->dev, "BDC_EPSTS7:0x%08x\n", temp);
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}
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void bdc_dbg_srr(struct bdc *bdc, u32 srr_num)
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{
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struct bdc_sr *sr;
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dma_addr_t addr;
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int i;
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sr = bdc->srr.sr_bds;
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addr = bdc->srr.dma_addr;
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dev_vdbg(bdc->dev, "bdc_dbg_srr sr:%p dqp_index:%d\n",
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sr, bdc->srr.dqp_index);
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for (i = 0; i < NUM_SR_ENTRIES; i++) {
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sr = &bdc->srr.sr_bds[i];
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dev_vdbg(bdc->dev, "%llx %08x %08x %08x %08x\n",
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(unsigned long long)addr,
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le32_to_cpu(sr->offset[0]),
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le32_to_cpu(sr->offset[1]),
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le32_to_cpu(sr->offset[2]),
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le32_to_cpu(sr->offset[3]));
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addr += sizeof(*sr);
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}
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}
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void bdc_dbg_bd_list(struct bdc *bdc, struct bdc_ep *ep)
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{
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struct bd_list *bd_list = &ep->bd_list;
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struct bd_table *bd_table;
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struct bdc_bd *bd;
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int tbi, bdi, gbdi;
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dma_addr_t dma;
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gbdi = 0;
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dev_vdbg(bdc->dev,
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"Dump bd list for %s epnum:%d\n",
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ep->name, ep->ep_num);
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dev_vdbg(bdc->dev,
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"tabs:%d max_bdi:%d eqp_bdi:%d hwd_bdi:%d num_bds_table:%d\n",
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bd_list->num_tabs, bd_list->max_bdi, bd_list->eqp_bdi,
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bd_list->hwd_bdi, bd_list->num_bds_table);
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for (tbi = 0; tbi < bd_list->num_tabs; tbi++) {
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bd_table = bd_list->bd_table_array[tbi];
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for (bdi = 0; bdi < bd_list->num_bds_table; bdi++) {
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bd = bd_table->start_bd + bdi;
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dma = bd_table->dma + (sizeof(struct bdc_bd) * bdi);
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dev_vdbg(bdc->dev,
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"tbi:%2d bdi:%2d gbdi:%2d virt:%p phys:%llx %08x %08x %08x %08x\n",
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tbi, bdi, gbdi++, bd, (unsigned long long)dma,
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le32_to_cpu(bd->offset[0]),
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le32_to_cpu(bd->offset[1]),
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le32_to_cpu(bd->offset[2]),
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le32_to_cpu(bd->offset[3]));
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}
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dev_vdbg(bdc->dev, "\n\n");
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}
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}
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