mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 02:18:13 +07:00
59d3e8be87
This patch adds Peripheral Page Request (PPR) failure processing and reporting. Bad address or pointer to a system memory block with inappropriate read/write permission cause such PPR failure during a user queue processing. PPR request handling is done by IOMMU driver notifying AMDKFD module on PPR failure. The process triggering a PPR failure will be notified by appropriate event or SIGTERM signal will be sent to it. v3: - Change all bool fields in struct kfd_memory_exception_failure to uint32_t Signed-off-by: Alexey Skidanov <alexey.skidanov@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
573 lines
15 KiB
C
573 lines
15 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/amd-iommu.h>
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#include <linux/bsearch.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include "kfd_priv.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_pm4_headers.h"
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#define MQD_SIZE_ALIGNED 768
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static const struct kfd_device_info kaveri_device_info = {
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.asic_family = CHIP_KAVERI,
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.max_pasid_bits = 16,
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.ih_ring_entry_size = 4 * sizeof(uint32_t),
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.event_interrupt_class = &event_interrupt_class_cik,
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.mqd_size_aligned = MQD_SIZE_ALIGNED
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};
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static const struct kfd_device_info carrizo_device_info = {
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.asic_family = CHIP_CARRIZO,
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.max_pasid_bits = 16,
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.ih_ring_entry_size = 4 * sizeof(uint32_t),
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.num_of_watch_points = 4,
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.mqd_size_aligned = MQD_SIZE_ALIGNED
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};
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struct kfd_deviceid {
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unsigned short did;
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const struct kfd_device_info *device_info;
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};
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/* Please keep this sorted by increasing device id. */
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static const struct kfd_deviceid supported_devices[] = {
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{ 0x1304, &kaveri_device_info }, /* Kaveri */
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{ 0x1305, &kaveri_device_info }, /* Kaveri */
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{ 0x1306, &kaveri_device_info }, /* Kaveri */
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{ 0x1307, &kaveri_device_info }, /* Kaveri */
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{ 0x1309, &kaveri_device_info }, /* Kaveri */
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{ 0x130A, &kaveri_device_info }, /* Kaveri */
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{ 0x130B, &kaveri_device_info }, /* Kaveri */
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{ 0x130C, &kaveri_device_info }, /* Kaveri */
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{ 0x130D, &kaveri_device_info }, /* Kaveri */
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{ 0x130E, &kaveri_device_info }, /* Kaveri */
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{ 0x130F, &kaveri_device_info }, /* Kaveri */
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{ 0x1310, &kaveri_device_info }, /* Kaveri */
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{ 0x1311, &kaveri_device_info }, /* Kaveri */
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{ 0x1312, &kaveri_device_info }, /* Kaveri */
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{ 0x1313, &kaveri_device_info }, /* Kaveri */
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{ 0x1315, &kaveri_device_info }, /* Kaveri */
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{ 0x1316, &kaveri_device_info }, /* Kaveri */
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{ 0x1317, &kaveri_device_info }, /* Kaveri */
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{ 0x1318, &kaveri_device_info }, /* Kaveri */
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{ 0x131B, &kaveri_device_info }, /* Kaveri */
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{ 0x131C, &kaveri_device_info }, /* Kaveri */
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{ 0x131D, &kaveri_device_info } /* Kaveri */
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};
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static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
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unsigned int chunk_size);
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static void kfd_gtt_sa_fini(struct kfd_dev *kfd);
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static const struct kfd_device_info *lookup_device_info(unsigned short did)
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{
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size_t i;
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for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
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if (supported_devices[i].did == did) {
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BUG_ON(supported_devices[i].device_info == NULL);
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return supported_devices[i].device_info;
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}
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}
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return NULL;
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}
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struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
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struct pci_dev *pdev, const struct kfd2kgd_calls *f2g)
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{
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struct kfd_dev *kfd;
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const struct kfd_device_info *device_info =
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lookup_device_info(pdev->device);
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if (!device_info)
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return NULL;
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kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
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if (!kfd)
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return NULL;
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kfd->kgd = kgd;
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kfd->device_info = device_info;
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kfd->pdev = pdev;
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kfd->init_complete = false;
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kfd->kfd2kgd = f2g;
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mutex_init(&kfd->doorbell_mutex);
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memset(&kfd->doorbell_available_index, 0,
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sizeof(kfd->doorbell_available_index));
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return kfd;
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}
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static bool device_iommu_pasid_init(struct kfd_dev *kfd)
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{
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const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
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AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
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AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
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struct amd_iommu_device_info iommu_info;
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unsigned int pasid_limit;
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int err;
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err = amd_iommu_device_info(kfd->pdev, &iommu_info);
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if (err < 0) {
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dev_err(kfd_device,
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"error getting iommu info. is the iommu enabled?\n");
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return false;
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}
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if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
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dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
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(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
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return false;
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}
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pasid_limit = min_t(unsigned int,
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(unsigned int)1 << kfd->device_info->max_pasid_bits,
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iommu_info.max_pasids);
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/*
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* last pasid is used for kernel queues doorbells
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* in the future the last pasid might be used for a kernel thread.
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*/
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pasid_limit = min_t(unsigned int,
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pasid_limit,
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kfd->doorbell_process_limit - 1);
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err = amd_iommu_init_device(kfd->pdev, pasid_limit);
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if (err < 0) {
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dev_err(kfd_device, "error initializing iommu device\n");
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return false;
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}
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if (!kfd_set_pasid_limit(pasid_limit)) {
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dev_err(kfd_device, "error setting pasid limit\n");
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amd_iommu_free_device(kfd->pdev);
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return false;
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}
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return true;
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}
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static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
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{
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struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);
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if (dev)
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kfd_unbind_process_from_device(dev, pasid);
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}
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/*
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* This function called by IOMMU driver on PPR failure
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*/
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static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
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unsigned long address, u16 flags)
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{
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struct kfd_dev *dev;
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dev_warn(kfd_device,
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"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
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PCI_BUS_NUM(pdev->devfn),
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PCI_SLOT(pdev->devfn),
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PCI_FUNC(pdev->devfn),
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pasid,
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address,
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flags);
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dev = kfd_device_by_pci_dev(pdev);
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BUG_ON(dev == NULL);
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kfd_signal_iommu_event(dev, pasid, address,
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flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
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return AMD_IOMMU_INV_PRI_RSP_INVALID;
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}
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bool kgd2kfd_device_init(struct kfd_dev *kfd,
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const struct kgd2kfd_shared_resources *gpu_resources)
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{
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unsigned int size;
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kfd->shared_resources = *gpu_resources;
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/* calculate max size of mqds needed for queues */
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size = max_num_of_queues_per_device *
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kfd->device_info->mqd_size_aligned;
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/*
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* calculate max size of runlist packet.
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* There can be only 2 packets at once
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*/
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size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
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max_num_of_queues_per_device *
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sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;
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/* Add size of HIQ & DIQ */
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size += KFD_KERNEL_QUEUE_SIZE * 2;
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/* add another 512KB for all other allocations on gart (HPD, fences) */
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size += 512 * 1024;
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if (kfd->kfd2kgd->init_gtt_mem_allocation(
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kfd->kgd, size, &kfd->gtt_mem,
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&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
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dev_err(kfd_device,
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"Could not allocate %d bytes for device (%x:%x)\n",
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size, kfd->pdev->vendor, kfd->pdev->device);
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goto out;
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}
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dev_info(kfd_device,
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"Allocated %d bytes on gart for device(%x:%x)\n",
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size, kfd->pdev->vendor, kfd->pdev->device);
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/* Initialize GTT sa with 512 byte chunk size */
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if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
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dev_err(kfd_device,
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"Error initializing gtt sub-allocator\n");
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goto kfd_gtt_sa_init_error;
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}
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kfd_doorbell_init(kfd);
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if (kfd_topology_add_device(kfd) != 0) {
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dev_err(kfd_device,
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"Error adding device (%x:%x) to topology\n",
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kfd->pdev->vendor, kfd->pdev->device);
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goto kfd_topology_add_device_error;
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}
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if (kfd_interrupt_init(kfd)) {
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dev_err(kfd_device,
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"Error initializing interrupts for device (%x:%x)\n",
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kfd->pdev->vendor, kfd->pdev->device);
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goto kfd_interrupt_error;
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}
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if (!device_iommu_pasid_init(kfd)) {
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dev_err(kfd_device,
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"Error initializing iommuv2 for device (%x:%x)\n",
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kfd->pdev->vendor, kfd->pdev->device);
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goto device_iommu_pasid_error;
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}
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amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
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iommu_pasid_shutdown_callback);
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amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
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kfd->dqm = device_queue_manager_init(kfd);
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if (!kfd->dqm) {
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dev_err(kfd_device,
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"Error initializing queue manager for device (%x:%x)\n",
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kfd->pdev->vendor, kfd->pdev->device);
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goto device_queue_manager_error;
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}
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if (kfd->dqm->ops.start(kfd->dqm) != 0) {
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dev_err(kfd_device,
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"Error starting queuen manager for device (%x:%x)\n",
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kfd->pdev->vendor, kfd->pdev->device);
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goto dqm_start_error;
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}
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kfd->init_complete = true;
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dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
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kfd->pdev->device);
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pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
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sched_policy);
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goto out;
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dqm_start_error:
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device_queue_manager_uninit(kfd->dqm);
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device_queue_manager_error:
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amd_iommu_free_device(kfd->pdev);
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device_iommu_pasid_error:
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kfd_interrupt_exit(kfd);
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kfd_interrupt_error:
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kfd_topology_remove_device(kfd);
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kfd_topology_add_device_error:
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kfd_gtt_sa_fini(kfd);
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kfd_gtt_sa_init_error:
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kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
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dev_err(kfd_device,
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"device (%x:%x) NOT added due to errors\n",
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kfd->pdev->vendor, kfd->pdev->device);
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out:
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return kfd->init_complete;
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}
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void kgd2kfd_device_exit(struct kfd_dev *kfd)
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{
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if (kfd->init_complete) {
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device_queue_manager_uninit(kfd->dqm);
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amd_iommu_free_device(kfd->pdev);
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kfd_interrupt_exit(kfd);
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kfd_topology_remove_device(kfd);
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kfd_gtt_sa_fini(kfd);
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kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
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}
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kfree(kfd);
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}
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void kgd2kfd_suspend(struct kfd_dev *kfd)
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{
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BUG_ON(kfd == NULL);
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if (kfd->init_complete) {
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kfd->dqm->ops.stop(kfd->dqm);
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amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
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amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
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amd_iommu_free_device(kfd->pdev);
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}
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}
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int kgd2kfd_resume(struct kfd_dev *kfd)
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{
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unsigned int pasid_limit;
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int err;
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BUG_ON(kfd == NULL);
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pasid_limit = kfd_get_pasid_limit();
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if (kfd->init_complete) {
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err = amd_iommu_init_device(kfd->pdev, pasid_limit);
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if (err < 0)
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return -ENXIO;
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amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
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iommu_pasid_shutdown_callback);
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amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
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kfd->dqm->ops.start(kfd->dqm);
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}
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return 0;
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}
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/* This is called directly from KGD at ISR. */
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void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
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{
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if (!kfd->init_complete)
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return;
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spin_lock(&kfd->interrupt_lock);
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if (kfd->interrupts_active
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&& interrupt_is_wanted(kfd, ih_ring_entry)
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&& enqueue_ih_ring_entry(kfd, ih_ring_entry))
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schedule_work(&kfd->interrupt_work);
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spin_unlock(&kfd->interrupt_lock);
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}
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static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
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unsigned int chunk_size)
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{
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unsigned int num_of_bits;
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BUG_ON(!kfd);
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BUG_ON(!kfd->gtt_mem);
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BUG_ON(buf_size < chunk_size);
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BUG_ON(buf_size == 0);
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BUG_ON(chunk_size == 0);
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kfd->gtt_sa_chunk_size = chunk_size;
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kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;
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num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
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BUG_ON(num_of_bits == 0);
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kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);
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if (!kfd->gtt_sa_bitmap)
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return -ENOMEM;
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pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
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kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);
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mutex_init(&kfd->gtt_sa_lock);
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return 0;
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}
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static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
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{
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mutex_destroy(&kfd->gtt_sa_lock);
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kfree(kfd->gtt_sa_bitmap);
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}
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static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
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unsigned int bit_num,
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unsigned int chunk_size)
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{
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return start_addr + bit_num * chunk_size;
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}
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static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr,
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unsigned int bit_num,
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unsigned int chunk_size)
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{
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return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size);
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}
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int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
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struct kfd_mem_obj **mem_obj)
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{
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unsigned int found, start_search, cur_size;
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BUG_ON(!kfd);
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if (size == 0)
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return -EINVAL;
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if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
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return -ENOMEM;
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*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
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if ((*mem_obj) == NULL)
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return -ENOMEM;
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pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);
|
|
|
|
start_search = 0;
|
|
|
|
mutex_lock(&kfd->gtt_sa_lock);
|
|
|
|
kfd_gtt_restart_search:
|
|
/* Find the first chunk that is free */
|
|
found = find_next_zero_bit(kfd->gtt_sa_bitmap,
|
|
kfd->gtt_sa_num_of_chunks,
|
|
start_search);
|
|
|
|
pr_debug("kfd: found = %d\n", found);
|
|
|
|
/* If there wasn't any free chunk, bail out */
|
|
if (found == kfd->gtt_sa_num_of_chunks)
|
|
goto kfd_gtt_no_free_chunk;
|
|
|
|
/* Update fields of mem_obj */
|
|
(*mem_obj)->range_start = found;
|
|
(*mem_obj)->range_end = found;
|
|
(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
|
|
kfd->gtt_start_gpu_addr,
|
|
found,
|
|
kfd->gtt_sa_chunk_size);
|
|
(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
|
|
kfd->gtt_start_cpu_ptr,
|
|
found,
|
|
kfd->gtt_sa_chunk_size);
|
|
|
|
pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
|
|
(uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);
|
|
|
|
/* If we need only one chunk, mark it as allocated and get out */
|
|
if (size <= kfd->gtt_sa_chunk_size) {
|
|
pr_debug("kfd: single bit\n");
|
|
set_bit(found, kfd->gtt_sa_bitmap);
|
|
goto kfd_gtt_out;
|
|
}
|
|
|
|
/* Otherwise, try to see if we have enough contiguous chunks */
|
|
cur_size = size - kfd->gtt_sa_chunk_size;
|
|
do {
|
|
(*mem_obj)->range_end =
|
|
find_next_zero_bit(kfd->gtt_sa_bitmap,
|
|
kfd->gtt_sa_num_of_chunks, ++found);
|
|
/*
|
|
* If next free chunk is not contiguous than we need to
|
|
* restart our search from the last free chunk we found (which
|
|
* wasn't contiguous to the previous ones
|
|
*/
|
|
if ((*mem_obj)->range_end != found) {
|
|
start_search = found;
|
|
goto kfd_gtt_restart_search;
|
|
}
|
|
|
|
/*
|
|
* If we reached end of buffer, bail out with error
|
|
*/
|
|
if (found == kfd->gtt_sa_num_of_chunks)
|
|
goto kfd_gtt_no_free_chunk;
|
|
|
|
/* Check if we don't need another chunk */
|
|
if (cur_size <= kfd->gtt_sa_chunk_size)
|
|
cur_size = 0;
|
|
else
|
|
cur_size -= kfd->gtt_sa_chunk_size;
|
|
|
|
} while (cur_size > 0);
|
|
|
|
pr_debug("kfd: range_start = %d, range_end = %d\n",
|
|
(*mem_obj)->range_start, (*mem_obj)->range_end);
|
|
|
|
/* Mark the chunks as allocated */
|
|
for (found = (*mem_obj)->range_start;
|
|
found <= (*mem_obj)->range_end;
|
|
found++)
|
|
set_bit(found, kfd->gtt_sa_bitmap);
|
|
|
|
kfd_gtt_out:
|
|
mutex_unlock(&kfd->gtt_sa_lock);
|
|
return 0;
|
|
|
|
kfd_gtt_no_free_chunk:
|
|
pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
|
|
mutex_unlock(&kfd->gtt_sa_lock);
|
|
kfree(mem_obj);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj)
|
|
{
|
|
unsigned int bit;
|
|
|
|
BUG_ON(!kfd);
|
|
|
|
/* Act like kfree when trying to free a NULL object */
|
|
if (!mem_obj)
|
|
return 0;
|
|
|
|
pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
|
|
mem_obj, mem_obj->range_start, mem_obj->range_end);
|
|
|
|
mutex_lock(&kfd->gtt_sa_lock);
|
|
|
|
/* Mark the chunks as free */
|
|
for (bit = mem_obj->range_start;
|
|
bit <= mem_obj->range_end;
|
|
bit++)
|
|
clear_bit(bit, kfd->gtt_sa_bitmap);
|
|
|
|
mutex_unlock(&kfd->gtt_sa_lock);
|
|
|
|
kfree(mem_obj);
|
|
return 0;
|
|
}
|