Shawn Lin 59cf70be5b arm64: dts: rockchip: add aspm-no-l0s for rk3399 ... Per the discussion of bug fix[1], we now actually leaves the default clock choice for pcie phy is derived from 24MHz OSC to guarantee the least BER. So let's add aspm-no-l0s here and folks could delete this property from their dts. [1] https://patchwork.kernel.org/patch/9470519/ Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>		2017-01-13 12:03:55 +01:00
..
Makefile	arm64: dts: rockchip: Add PX5 Evaluation board	2016-10-16 02:42:59 +02:00
rk3368-evb-act8846.dts	arm64: dts: rockchip: correct voltage range for rk3368-evb-act8846 board	2015-12-11 14:02:25 +01:00
rk3368-evb.dtsi	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3368-geekbox.dts	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3368-orion-r68-meta.dts	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3368-px5-evb.dts	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3368-r88.dts	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3368.dtsi	ARM: 64-bit DT updates for v4.10	2016-12-15 15:58:28 -08:00
rk3399-evb.dts	arm64: dts: rockchip: use pin constants to describe gpios	2017-01-02 14:25:10 +01:00
rk3399.dtsi	arm64: dts: rockchip: add aspm-no-l0s for rk3399	2017-01-13 12:03:55 +01:00