mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-16 07:46:51 +07:00
efb9ca08b5
This avoids us executing an mfc0 c0_count instruction on processors which
don't have but also on certain R4000 and R4400 versions where reading from
the count register just in the very moment when its value equals
c0_compare will result in the timer interrupt getting lost.
There is still a number of users of get_cycles remaining outside the
arch code:
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
crypto/tcrypt.c: start = get_cycles();
crypto/tcrypt.c: end = get_cycles();
drivers/char/hangcheck-timer.c: return get_cycles();
drivers/char/hangcheck-timer.c: printk("Hangcheck: Using get_cycles().\n");
drivers/char/random.c: sample.cycles = get_cycles();
drivers/input/joystick/analog.c:#define GET_TIME(x) do { x = get_cycles(); }
include/linux/arcdevice.h: _x = get_cycles(); \
include/linux/arcdevice.h: _y = get_cycles(); \
mm/slub.c: if (!s->defrag_ratio || get_cycles() % 1024 > s->defrag_ratio)
mm/slub.c: p += 64 + (get_cycles() & 0xff) * sizeof(void *);
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
44 lines
1.0 KiB
C
44 lines
1.0 KiB
C
/*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file "COPYING" in the main directory of this archive
|
|
* for more details.
|
|
*
|
|
* Copyright (C) 1998, 1999, 2003 by Ralf Baechle
|
|
*/
|
|
#ifndef _ASM_TIMEX_H
|
|
#define _ASM_TIMEX_H
|
|
|
|
#ifdef __KERNEL__
|
|
|
|
#include <asm/mipsregs.h>
|
|
|
|
/*
|
|
* This is the clock rate of the i8253 PIT. A MIPS system may not have
|
|
* a PIT by the symbol is used all over the kernel including some APIs.
|
|
* So keeping it defined to the number for the PIT is the only sane thing
|
|
* for now.
|
|
*/
|
|
#define CLOCK_TICK_RATE 1193182
|
|
|
|
/*
|
|
* Standard way to access the cycle counter.
|
|
* Currently only used on SMP for scheduling.
|
|
*
|
|
* Only the low 32 bits are available as a continuously counting entity.
|
|
* But this only means we'll force a reschedule every 8 seconds or so,
|
|
* which isn't an evil thing.
|
|
*
|
|
* We know that all SMP capable CPUs have cycle counters.
|
|
*/
|
|
|
|
typedef unsigned int cycles_t;
|
|
|
|
static inline cycles_t get_cycles(void)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
#endif /* _ASM_TIMEX_H */
|