mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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bd132858e9
The HuC loading process is similar to GuC. The intel_uc_fw_fetch()
is used for both cases.
HuC loading needs to be before GuC loading. The WOPCM setting must
be done early before loading any of them.
v2: rebased on-top of drm-intel-nightly.
removed if(HAS_GUC()) before the guc call. (D.Gordon)
update huc_version number of format.
v3: rebased to drm-intel-nightly, changed the file name format to
match the one in the huc package.
Changed dev->dev_private to to_i915()
v4: moved function back to where it was.
change wait_for_atomic to wait_for.
v5: rebased. Changed the year in the copyright message to reflect
the right year.Correct the comments,remove the unwanted WARN message,
replace drm_gem_object_unreference() with i915_gem_object_put().Make the
prototypes in intel_huc.h non-extern.
v6: rebased. Update the file construction done by HuC. It is similar to
GuC.Adopted the approach used in-
https://patchwork.freedesktop.org/patch/104355/ <Tvrtko Ursulin>
v7: Change dev to dev_priv in macro definition.
Corrected comments.
v8: rebased on top of drm-tip. Updated functions intel_huc_load(),
intel_huc_init() and intel_uc_fw_fetch() to accept dev_priv instead of
dev. Moved contents of intel_huc.h to intel_uc.h.
v9: change SKL_FW_ to SKL_HUC_FW_. Add intel_ prefix to guc_wopcm_size().
Remove unwanted checks in intel_uc.h. Rename huc_fw in struct intel_huc to
simply fw to avoid redundency.
v10: rebased. Correct comments. Make intel_huc_fini() accept dev_priv
instead of dev like intel_huc_init() and intel_huc_load().Move definition
to i915_guc_reg.h from intel_uc.h. Clean DMA_CTRL bits after HuC DMA
transfer in huc_ucode_xfer() instead of guc_ucode_xfer(). Add suitable
WARNs to give extra info.
v11: rebased. Add proper bias for HuC and make sure there are
asserts on failure by using guc_ggtt_offset_vma(). Introduce
intel_huc.c and remove intel_huc_loader.c since it has functions that
do more than just loading.Correct year in copyright.
v12: remove invalidates that are not required anymore.
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1484755558-1234-1-git-send-email-anusha.srivatsa@intel.com
135 lines
2.9 KiB
Makefile
135 lines
2.9 KiB
Makefile
#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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subdir-ccflags-$(CONFIG_DRM_I915_WERROR) := -Werror
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subdir-ccflags-y += \
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$(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
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# Please keep these build lists sorted!
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# core driver code
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i915-y := i915_drv.o \
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i915_irq.o \
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i915_memcpy.o \
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i915_mm.o \
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i915_params.o \
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i915_pci.o \
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i915_suspend.o \
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i915_sw_fence.o \
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i915_sysfs.o \
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intel_csr.o \
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intel_device_info.o \
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intel_pm.o \
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intel_runtime_pm.o
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i915-$(CONFIG_COMPAT) += i915_ioc32.o
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i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o intel_pipe_crc.o
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# GEM code
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i915-y += i915_cmd_parser.o \
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i915_gem_batch_pool.o \
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i915_gem_context.o \
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i915_gem_dmabuf.o \
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i915_gem_evict.o \
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i915_gem_execbuffer.o \
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i915_gem_fence_reg.o \
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i915_gem_gtt.o \
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i915_gem_internal.o \
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i915_gem.o \
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i915_gem_render_state.o \
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i915_gem_request.o \
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i915_gem_shrinker.o \
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i915_gem_stolen.o \
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i915_gem_tiling.o \
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i915_gem_timeline.o \
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i915_gem_userptr.o \
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i915_trace_points.o \
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i915_vma.o \
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intel_breadcrumbs.o \
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intel_engine_cs.o \
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intel_hangcheck.o \
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intel_lrc.o \
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intel_mocs.o \
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intel_ringbuffer.o \
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intel_uncore.o
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# general-purpose microcontroller (GuC) support
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i915-y += intel_uc.o \
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intel_guc_log.o \
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intel_guc_loader.o \
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intel_huc.o \
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i915_guc_submission.o
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# autogenerated null render state
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i915-y += intel_renderstate_gen6.o \
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intel_renderstate_gen7.o \
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intel_renderstate_gen8.o \
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intel_renderstate_gen9.o
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# modesetting core code
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i915-y += intel_audio.o \
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intel_atomic.o \
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intel_atomic_plane.o \
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intel_bios.o \
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intel_color.o \
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intel_display.o \
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intel_dpio_phy.o \
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intel_dpll_mgr.o \
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intel_fbc.o \
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intel_fifo_underrun.o \
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intel_frontbuffer.o \
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intel_hotplug.o \
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intel_modes.o \
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intel_overlay.o \
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intel_psr.o \
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intel_sideband.o \
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intel_sprite.o
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i915-$(CONFIG_ACPI) += intel_acpi.o intel_opregion.o
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i915-$(CONFIG_DRM_FBDEV_EMULATION) += intel_fbdev.o
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# modesetting output/encoder code
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i915-y += dvo_ch7017.o \
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dvo_ch7xxx.o \
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dvo_ivch.o \
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dvo_ns2501.o \
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dvo_sil164.o \
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dvo_tfp410.o \
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intel_crt.o \
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intel_ddi.o \
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intel_dp_aux_backlight.o \
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intel_dp_link_training.o \
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intel_dp_mst.o \
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intel_dp.o \
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intel_dsi.o \
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intel_dsi_dcs_backlight.o \
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intel_dsi_panel_vbt.o \
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intel_dsi_pll.o \
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intel_dvo.o \
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intel_hdmi.o \
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intel_i2c.o \
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intel_lspcon.o \
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intel_lvds.o \
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intel_panel.o \
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intel_sdvo.o \
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intel_tv.o
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# Post-mortem debug and GPU hang state capture
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i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
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# virtual gpu code
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i915-y += i915_vgpu.o
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# perf code
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i915-y += i915_perf.o \
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i915_oa_hsw.o
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ifeq ($(CONFIG_DRM_I915_GVT),y)
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i915-y += intel_gvt.o
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include $(src)/gvt/Makefile
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endif
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obj-$(CONFIG_DRM_I915) += i915.o
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CFLAGS_i915_trace_points.o := -I$(src)
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