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a8c4c20dfa
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits) [ARM] 3541/2: workaround for PXA27x erratum E7 [ARM] nommu: provide a way for correct control register value selection [ARM] 3705/1: add supersection support to ioremap() [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency [ARM] 3703/1: Add help description for ARCH_EP80219 [ARM] 3678/1: MMC: Make OMAP MMC work [ARM] 3677/1: OMAP: Update H2 defconfig [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1 [ARM] Add section support to ioremap [ARM] Fix sa11x0 SDRAM selection [ARM] Set bit 4 on section mappings correctly depending on CPU [ARM] 3666/1: TRIZEPS4 [1/5] core ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE ARM: OMAP: Update dmtimers ARM: OMAP: Make clock variables static ARM: OMAP: Fix GPMC compilation when DEBUG is defined ARM: OMAP: Mux updates for external DMA and GPIO ...
136 lines
4.8 KiB
C
136 lines
4.8 KiB
C
/*
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* linux/arch/arm/mach-omap2/mux.c
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*
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* OMAP1 pin multiplexing configurations
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*
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* Copyright (C) 2003 - 2005 Nokia Corporation
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*
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* Written by Tony Lindgren <tony.lindgren@nokia.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <linux/spinlock.h>
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#include <asm/arch/mux.h>
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#ifdef CONFIG_OMAP_MUX
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/* NOTE: See mux.h for the enumeration */
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struct pin_config __initdata_or_module omap24xx_pins[] = {
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/*
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* description mux mux pull pull debug
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* offset mode ena type
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*/
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/* 24xx I2C */
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MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1)
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MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1)
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MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1)
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MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1)
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/* Menelaus interrupt */
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MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1)
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/* 24xx clocks */
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MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1)
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/* 24xx GPMC wait pin monitoring */
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MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1)
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MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1)
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MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1)
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MUX_CFG_24XX("P1_GPMC_WAIT3", 0x09d, 0, 1, 1, 1)
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/* 24xx McBSP */
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MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1)
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MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1)
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MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1)
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MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1)
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/* 24xx GPIO */
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MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1)
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MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1)
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MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1)
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MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1)
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MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1)
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MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1)
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MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1)
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MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1)
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MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1)
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MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1)
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MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1)
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/* 242x DBG GPIO */
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MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1)
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MUX_CFG_24XX("W2_242X_GPIO50", 0xd4, 3, 0, 0, 1)
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MUX_CFG_24XX("U4_242X_GPIO51", 0xd5, 3, 0, 0, 1)
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MUX_CFG_24XX("V3_242X_GPIO52", 0xd6, 3, 0, 0, 1)
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MUX_CFG_24XX("V2_242X_GPIO53", 0xd7, 3, 0, 0, 1)
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MUX_CFG_24XX("V6_242X_GPIO53", 0xcf, 3, 0, 0, 1)
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MUX_CFG_24XX("T4_242X_GPIO54", 0xd8, 3, 0, 0, 1)
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MUX_CFG_24XX("Y4_242X_GPIO54", 0xd0, 3, 0, 0, 1)
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MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1)
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MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1)
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/* 24xx external DMA requests */
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MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1)
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MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1)
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MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1)
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MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1)
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MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1)
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MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1)
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/* TSC IRQ */
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MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
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/* UART3 */
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MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
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MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
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/* Keypad GPIO*/
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MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
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MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
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MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1)
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MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1)
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MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1)
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MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1)
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MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1)
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MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1)
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MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1)
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MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1)
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MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1)
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MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1)
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MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1)
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/* 24xx Menelaus Keypad GPIO */
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MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1)
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MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1)
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MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1)
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};
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int __init omap2_mux_init(void)
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{
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omap_mux_register(omap24xx_pins, ARRAY_SIZE(omap24xx_pins));
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return 0;
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}
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#endif
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