linux_dsm_epyc7002/arch/xtensa
Max Filippov 58c3e3ac7a xtensa: xtfpga: use clock provider, don't update DT
Instead of querying hardcoded FPGA frequency register and then updating
clock-frequency property in specificly named DT nodes in machine setup
code register a clock provider that returns fixed-rate clock, configured
by register specified in DT. This way we have less magic/hardcoded names
and use more existing common clock framework code.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
2016-09-20 18:52:51 -07:00
..
boot xtensa: xtfpga: use clock provider, don't update DT 2016-09-20 18:52:51 -07:00
configs xtensa: Added Cadence CSP kernel configuration for Xtensa 2016-09-09 18:39:09 -07:00
include xtensa: extract common CPU reset code into separate function 2016-09-11 23:53:22 -07:00
kernel xtensa: initialize MMU before jumping to reset vector 2016-09-11 23:53:23 -07:00
lib xtensa: fixes for configs without loop option 2015-11-02 18:02:47 +03:00
mm xtensa: support reserved-memory DT node 2016-07-24 06:34:00 +03:00
oprofile xtensa: move oprofile stack tracing to stacktrace.c 2015-08-17 07:32:49 +03:00
platforms xtensa: xtfpga: use clock provider, don't update DT 2016-09-20 18:52:51 -07:00
variants xtensa: Added Cadence CSP kernel configuration for Xtensa 2016-09-09 18:39:09 -07:00
Kconfig xtensa: fix default kernel load address 2016-09-09 18:38:35 -07:00
Kconfig.debug xtensa: disable link optimization 2014-12-15 23:47:24 -08:00
Makefile xtensa: define CONFIG_CPU_{BIG,LITTLE}_ENDIAN 2016-03-11 08:53:31 +00:00