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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d64420e816
Rockchip SoCs use 2 different numbering schemes. Where the gpio- controllers just count 0-31 for their 32 gpios, the underlying iomux controller splits these into 4 separate entities A-D. Device-schematics always use these iomux-values to identify pins, so to make mapping schematics to devicetree easier Andy Yan introduced named constants for the pins but so far we only used them on new additions. Using a sed-script created by Emil Renner Berthing bulk-convert the remaining raw gpio numbers into their descriptive counterparts and also gets rid of the unhelpful RK_FUNC_x -> x and RK_GPIOx -> x mappings: /rockchip,pins *=/bcheck b # to end of script :append-next-line N :check /^[^;]*$/bappend-next-line s/<RK_GPIO\([0-9]\) /<\1 /g s/<\([^ ][^ ]* *\)0 /<\1RK_PA0 /g s/<\([^ ][^ ]* *\)1 /<\1RK_PA1 /g s/<\([^ ][^ ]* *\)2 /<\1RK_PA2 /g s/<\([^ ][^ ]* *\)3 /<\1RK_PA3 /g s/<\([^ ][^ ]* *\)4 /<\1RK_PA4 /g s/<\([^ ][^ ]* *\)5 /<\1RK_PA5 /g s/<\([^ ][^ ]* *\)6 /<\1RK_PA6 /g s/<\([^ ][^ ]* *\)7 /<\1RK_PA7 /g s/<\([^ ][^ ]* *\)8 /<\1RK_PB0 /g s/<\([^ ][^ ]* *\)9 /<\1RK_PB1 /g s/<\([^ ][^ ]* *\)10 /<\1RK_PB2 /g s/<\([^ ][^ ]* *\)11 /<\1RK_PB3 /g s/<\([^ ][^ ]* *\)12 /<\1RK_PB4 /g s/<\([^ ][^ ]* *\)13 /<\1RK_PB5 /g s/<\([^ ][^ ]* *\)14 /<\1RK_PB6 /g s/<\([^ ][^ ]* *\)15 /<\1RK_PB7 /g s/<\([^ ][^ ]* *\)16 /<\1RK_PC0 /g s/<\([^ ][^ ]* *\)17 /<\1RK_PC1 /g s/<\([^ ][^ ]* *\)18 /<\1RK_PC2 /g s/<\([^ ][^ ]* *\)19 /<\1RK_PC3 /g s/<\([^ ][^ ]* *\)20 /<\1RK_PC4 /g s/<\([^ ][^ ]* *\)21 /<\1RK_PC5 /g s/<\([^ ][^ ]* *\)22 /<\1RK_PC6 /g s/<\([^ ][^ ]* *\)23 /<\1RK_PC7 /g s/<\([^ ][^ ]* *\)24 /<\1RK_PD0 /g s/<\([^ ][^ ]* *\)25 /<\1RK_PD1 /g s/<\([^ ][^ ]* *\)26 /<\1RK_PD2 /g s/<\([^ ][^ ]* *\)27 /<\1RK_PD3 /g s/<\([^ ][^ ]* *\)28 /<\1RK_PD4 /g s/<\([^ ][^ ]* *\)29 /<\1RK_PD5 /g s/<\([^ ][^ ]* *\)30 /<\1RK_PD6 /g s/<\([^ ][^ ]* *\)31 /<\1RK_PD7 /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)0 /<\1RK_FUNC_GPIO /g s/<\([^ ][^ ]* *[^ ][^ ]* *\)RK_FUNC_\([1-9]\) /<\1\2 /g Suggested-by: Emil Renner Berthing <esmil@mailme.dk> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Acked-by: Robin Murphy <robin.murphy@arm.com>
80 lines
1.5 KiB
Plaintext
80 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Gru-Bob Rev 4+ board device tree source
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*
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* Copyright 2018 Google, Inc
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*/
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/dts-v1/;
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#include "rk3399-gru-chromebook.dtsi"
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/ {
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model = "Google Bob";
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compatible = "google,bob-rev13", "google,bob-rev12",
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"google,bob-rev11", "google,bob-rev10",
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"google,bob-rev9", "google,bob-rev8",
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"google,bob-rev7", "google,bob-rev6",
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"google,bob-rev5", "google,bob-rev4",
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"google,bob", "google,gru", "rockchip,rk3399";
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edp_panel: edp-panel {
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compatible = "boe,nv101wxmn51", "simple-panel";
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backlight = <&backlight>;
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power-supply = <&pp3300_disp>;
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&edp_out_panel>;
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};
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};
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};
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};
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&ap_i2c_ts {
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touchscreen: touchscreen@10 {
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compatible = "elan,ekth3500";
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reg = <0x10>;
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interrupt-parent = <&gpio3>;
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interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&touch_int_l &touch_reset_l>;
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reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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};
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&ap_i2c_tp {
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trackpad: trackpad@15 {
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compatible = "elan,ekth3000";
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reg = <0x15>;
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interrupt-parent = <&gpio1>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&trackpad_int_l>;
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wakeup-source;
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};
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};
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&backlight {
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pwms = <&cros_ec_pwm 0>;
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};
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&cpu_alert0 {
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temperature = <65000>;
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};
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&cpu_alert1 {
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temperature = <70000>;
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};
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&spi0 {
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status = "okay";
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};
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&pinctrl {
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tpm {
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h1_int_od_l: h1-int-od-l {
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rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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